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Searched refs:Op4 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/XCore/Disassembler/
DXCoreDisassembler.cpp661 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local
666 S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5, Op6); in DecodeL6RInstruction()
670 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); in DecodeL6RInstruction()
695 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local
700 S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5); in DecodeL5RInstruction()
705 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); in DecodeL5RInstruction()
716 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction() local
721 S = DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); in DecodeL4RSrcDstInstruction()
724 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder); in DecodeL4RSrcDstInstruction()
735 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstSrcDstInstruction() local
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/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp3623 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
3625 if (Op1.isReg() && Op3.isImm() && Op4.isImm()) { in MatchAndEmitInstruction()
3627 const MCConstantExpr *Op4CE = dyn_cast<MCConstantExpr>(Op4.getImm()); in MatchAndEmitInstruction()
3644 return Error(Op4.getStartLoc(), in MatchAndEmitInstruction()
3657 return Error(Op4.getStartLoc(), in MatchAndEmitInstruction()
3667 NewOp4, Op4.getStartLoc(), Op4.getEndLoc(), getContext()); in MatchAndEmitInstruction()
3688 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
3690 if (Op1.isReg() && Op3.isImm() && Op4.isImm()) { in MatchAndEmitInstruction()
3692 const MCConstantExpr *Op4CE = dyn_cast<MCConstantExpr>(Op4.getImm()); in MatchAndEmitInstruction()
3709 return Error(Op4.getStartLoc(), in MatchAndEmitInstruction()
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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp1107 SDValue Op4 = Node->getOperand(4); in Select() local
1108 Node = CurDAG->UpdateNodeOperands(Node, Op1, Op0, CCValid, CCMask, Op4); in Select()
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h859 SDValue Op3, SDValue Op4);
861 SDValue Op3, SDValue Op4, SDValue Op5);
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp2763 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
2769 if (!SelectAddr(nullptr, Op, Op0, Op1, Op2, Op3, Op4)) in SelectInlineAsmMemoryOperand()
2778 OutOps.push_back(Op4); in SelectInlineAsmMemoryOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp5270 SDValue Op3, SDValue Op4) { in UpdateNodeOperands() argument
5271 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; in UpdateNodeOperands()
5277 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands() argument
5278 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; in UpdateNodeOperands()