/external/ppp/pppd/ |
D | sha1.c | 39 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 83 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1_Transform() 84 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1_Transform() 85 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1_Transform() 86 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1_Transform() 87 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1_Transform()
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/external/llvm/test/CodeGen/ARM/Windows/ |
D | vla.ll | 16 ; CHECK-SMALL-CODE: adds [[R4:r[0-9]+]], #7 17 ; CHECK-SMALL-CODE: bic [[R4]], [[R4]], #7 18 ; CHECK-SMALL-CODE: lsrs r4, [[R4]], #2 22 ; CHECK-LARGE-CODE: adds [[R4:r[0-9]+]], #7 23 ; CHECK-LARGE-CODE: bic [[R4]], [[R4]], #7 24 ; CHECK-LARGE-CODE: lsrs r4, [[R4]], #2
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/external/valgrind/main/none/tests/ |
D | sha1_test.c | 97 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 142 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 143 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 144 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 145 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 146 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
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/external/wpa_supplicant_8/src/crypto/ |
D | sha1-internal.c | 152 #define R4(v,w,x,y,z,i) \ macro 210 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 211 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 212 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 213 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 214 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
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/external/chromium_org/third_party/webrtc/base/ |
D | sha1.cc | 136 #define R4(v, w, x, y, z, i) \ macro 195 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 196 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 197 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 198 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 199 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
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/external/chromium_org/third_party/smhasher/src/ |
D | sha1.cpp | 111 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 149 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1_Transform() 150 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1_Transform() 151 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1_Transform() 152 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1_Transform() 153 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1_Transform()
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/external/llvm/test/CodeGen/Mips/ |
D | cttz-v.ll | 12 ; MIPS32-DAG: addiu $[[R4:[0-9]+]], $zero, 32 13 ; MIPS32-DAG: subu $2, $[[R4]], $[[R3]] 19 ; MIPS32-DAG: subu $3, $[[R4]], $[[R8]] 25 ; MIPS64-DAG: addiu $[[R4:[0-9]+]], $zero, 32 26 ; MIPS64-DAG: subu $2, $[[R4]], $[[R3]] 32 ; MIPS64-DAG: subu $3, $[[R4]], $[[R8]]
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D | bswap.ll | 20 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280 21 ; MIPS16-DAG: and $[[R4]], $[[R0]] 22 ; MIPS16-DAG: or $[[R1]], $[[R4]] 49 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280 50 ; MIPS16-DAG: and $[[R0]], $[[R4]] 60 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280 61 ; MIPS16-DAG: and $[[R0]], $[[R4]]
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D | 2010-07-20-Switch.ll | 26 ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]]) 27 ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]] 32 ; N64: ld $[[R4:[0-9]+]], %got_ofst($JTI0_0)($[[R2]]) 33 ; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
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D | atomic.ll | 108 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 109 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 148 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 149 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 187 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 188 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 227 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 228 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 266 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 267 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 [all …]
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/external/qemu/distrib/ext4_utils/src/ |
D | sha1.c | 57 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 80 #define nR4(v,w,x,y,z,i) R4(*v,*w,*x,*y,*z,i) 176 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); 177 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); 178 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); 179 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); 180 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79);
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/external/bison/doc/figs/ |
D | example-reduce.dot | 9 1 -> "1R4" [label="[\";\"]" style=solid] 10 "1R4" [style=filled shape=diamond fillcolor=yellowgreen label="R4"]
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D | example.dot | 18 1 -> "1R4" [label="[\".\"]", style=solid] 19 "1R4" [label="R4", fillcolor=3, shape=diamond, style=filled]
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/external/llvm/test/CodeGen/Mips/msa/ |
D | 3r_splat.ll | 26 ; MIPS32-DAG: splat.b [[R4:\$w[0-9]+]], [[R3]][$4] 27 ; MIPS32-DAG: st.b [[R4]], 0([[R2]]) 47 ; MIPS32-DAG: splat.h [[R4:\$w[0-9]+]], [[R3]][$4] 48 ; MIPS32-DAG: st.h [[R4]], 0([[R2]]) 68 ; MIPS32-DAG: splat.w [[R4:\$w[0-9]+]], [[R3]][$4] 69 ; MIPS32-DAG: st.w [[R4]], 0([[R2]]) 92 ; MIPS64-DAG: splat.d [[R4:\$w[0-9]+]], [[R3]][$4] 93 ; MIPS64-DAG: st.d [[R4]], 0([[R2]])
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D | 3r-b.ll | 116 ; CHECK-DAG: ld.b [[R4:\$w[0-9]+]], 0([[R1]]) 119 ; CHECK-DAG: binsl.b [[R4]], [[R5]], [[R6]] 120 ; CHECK-DAG: st.b [[R4]], 0( 144 ; CHECK-DAG: ld.h [[R4:\$w[0-9]+]], 0([[R1]]) 147 ; CHECK-DAG: binsl.h [[R4]], [[R5]], [[R6]] 148 ; CHECK-DAG: st.h [[R4]], 0( 172 ; CHECK-DAG: ld.w [[R4:\$w[0-9]+]], 0([[R1]]) 175 ; CHECK-DAG: binsl.w [[R4]], [[R5]], [[R6]] 176 ; CHECK-DAG: st.w [[R4]], 0( 200 ; CHECK-DAG: ld.d [[R4:\$w[0-9]+]], 0([[R1]]) [all …]
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D | bitcast.ll | 51 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]] 52 ; BIGENDIAN: st.h [[R4]], 99 ; BIGENDIAN: addv.w [[R4:\$w[0-9]+]], [[R3]], [[R3]] 100 ; BIGENDIAN: st.w [[R4]], 124 ; BIGENDIAN: fadd.w [[R4:\$w[0-9]+]], [[R3]], [[R3]] 125 ; BIGENDIAN: st.w [[R4]], 150 ; BIGENDIAN: addv.d [[R4:\$w[0-9]+]], [[R3]], [[R3]] 151 ; BIGENDIAN: st.d [[R4]], 176 ; BIGENDIAN: fadd.d [[R4:\$w[0-9]+]], [[R3]], [[R3]] 177 ; BIGENDIAN: st.d [[R4]], [all …]
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D | bitwise.ll | 74 ; CHECK-DAG: andi.b [[R4:\$w[0-9]+]], [[R1]], 1 76 ; CHECK-DAG: st.b [[R4]], 0($4) 89 ; CHECK-DAG: and.v [[R4:\$w[0-9]+]], [[R1]], [[R3]] 91 ; CHECK-DAG: st.h [[R4]], 0($4) 104 ; CHECK-DAG: and.v [[R4:\$w[0-9]+]], [[R1]], [[R3]] 106 ; CHECK-DAG: st.w [[R4]], 0($4) 119 ; CHECK-DAG: and.v [[R4:\$w[0-9]+]], [[R1]], [[R3]] 121 ; CHECK-DAG: st.d [[R4]], 0($4) 197 ; CHECK-DAG: ori.b [[R4:\$w[0-9]+]], [[R1]], 3 199 ; CHECK-DAG: st.b [[R4]], 0($4) [all …]
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D | i5-b.ll | 103 ; CHECK-DAG: ld.b [[R4:\$w[0-9]+]], 0([[R2]]) 104 ; CHECK-DAG: binsli.b [[R3]], [[R4]], 7 128 ; CHECK-DAG: ld.h [[R4:\$w[0-9]+]], 0([[R2]]) 129 ; CHECK-DAG: binsli.h [[R3]], [[R4]], 7 153 ; CHECK-DAG: ld.w [[R4:\$w[0-9]+]], 0([[R2]]) 154 ; CHECK-DAG: binsli.w [[R3]], [[R4]], 7 182 ; CHECK-DAG: ld.d [[R4:\$w[0-9]+]], 0([[R2]]) 183 ; CHECK-DAG: binsli.d [[R3]], [[R4]], 61 207 ; CHECK-DAG: ld.b [[R4:\$w[0-9]+]], 0([[R2]]) 208 ; CHECK-DAG: binsri.b [[R3]], [[R4]], 7 [all …]
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/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/tests/ |
D | lc3b-mp22NC.asm | 16 ADD R4, R2, -4 18 STB R7, R4, 0 28 ADD R4, R2, -10 31 STB R7, R4, 0 46 AND R4, R4, 0 48 ADD R4, R4, -1 53 ADD R3, R3, R4
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/external/llvm/test/CodeGen/ARM/ |
D | fast-isel-call.ll | 102 ; ARM: movw [[R4:l?r[0-9]*]], #40 108 ; ARM: and [[R4]], [[R4]], #255 109 ; ARM: str [[R4]], [sp] 110 ; ARM: and [[R4]], [[R5]], #255 111 ; ARM: str [[R4]], [sp, #4] 127 ; THUMB: movw [[R4:l?r[0-9]*]], #40 128 ; THUMB: movt [[R4]], #0 135 ; THUMB: and [[R4]], [[R4]], #255 136 ; THUMB: str.w [[R4]], [sp] 137 ; THUMB: and [[R4]], [[R5]], #255 [all …]
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/external/llvm/test/CodeGen/Mips/cconv/ |
D | return-hard-fp128.ll | 23 ; N32-DAG: ld [[R4:\$[0-9]+]], 8([[R3]]) 25 ; N32-DAG: dmtc1 [[R4]], $f2 29 ; N64-DAG: ld [[R4:\$[0-9]+]], 8([[R2]]) 31 ; N64-DAG: dmtc1 [[R4]], $f2
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D | arguments-float.ll | 67 ; O32-DAG: lw [[R4:\$([0-9]+|gp)]], 28($sp) 69 ; O32-DAG: sw [[R4]], 28([[R2]]) 73 ; O32-DAG: lw [[R4:\$[0-9]+]], 36($sp) 75 ; O32-DAG: sw [[R4]], 36([[R2]]) 79 ; O32-DAG: lw [[R4:\$[0-9]+]], 44($sp) 81 ; O32-DAG: sw [[R4]], 44([[R2]]) 85 ; O32-DAG: lw [[R4:\$[0-9]+]], 52($sp) 87 ; O32-DAG: sw [[R4]], 52([[R2]]) 91 ; O32-DAG: lw [[R4:\$[0-9]+]], 60($sp) 93 ; O32-DAG: sw [[R4]], 60([[R2]]) [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 236 case ARM::R4: in emitPrologue() 305 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4) in emitPrologue() 309 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R4) in emitPrologue() 321 .addReg(ARM::R4, RegState::Implicit) in emitPrologue() 333 .addReg(ARM::R4, RegState::Implicit) in emitPrologue() 341 .addReg(ARM::R4, RegState::Kill) in emitPrologue() 394 case ARM::R4: in emitPrologue() 532 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4) in emitPrologue() 535 TII.get(ARM::t2BICri), ARM::R4) in emitPrologue() 536 .addReg(ARM::R4, RegState::Kill) in emitPrologue() [all …]
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/external/llvm/test/CodeGen/SPARC/ |
D | blockaddr.ll | 37 ; abs64: sllx [[R3]], 32, [[R4:%[gilo][0-7]]] 48 ; v8pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]] 50 ; v8pic32: ld [%[[R2]]+%[[R4]]], %o0 59 ; v9pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]] 61 ; v9pic32: ldx [%[[R2]]+%[[R4]]], %o0
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/external/llvm/lib/Target/XCore/ |
D | XCoreRegisterInfo.td | 30 def R4 : Ri< 4, "r4">, DwarfRegNum<[4]>; 49 R4, R5, R6, R7, R8, R9, R10, 56 R4, R5, R6, R7, R8, R9, R10,
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