Searched refs:SCVTF (Results 1 – 8 of 8) sorted by relevance
| /external/vixl/src/a64/ |
| D | constants-a64.h | 1067 SCVTF = FPIntegerConvertFixed | 0x00020000, enumerator
1068 SCVTF_sw = SCVTF,
1069 SCVTF_sx = SCVTF | SixtyFourBits,
1070 SCVTF_dw = SCVTF | FP64,
1071 SCVTF_dx = SCVTF | SixtyFourBits | FP64,
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| D | assembler-a64.cc | 1490 Emit(SF(rn) | FPType(fd) | SCVTF | Rn(rn) | Rd(fd)); in scvtf()
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| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 1185 SCVTF = FPIntegerConvertFixed | 0x00020000, enumerator
1186 SCVTF_sw = SCVTF,
1187 SCVTF_sx = SCVTF | SixtyFourBits,
1188 SCVTF_dw = SCVTF | FP64,
1189 SCVTF_dx = SCVTF | SixtyFourBits | FP64,
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| D | assembler-arm64.cc | 2048 Emit(SF(rn) | FPType(fd) | SCVTF | Rn(rn) | Rd(fd)); in scvtf()
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 26 # SCVTF on fixed point W-registers is undefined if scale<5> == 0.
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_64.c | 109 #define SCVTF 0x9e620000 macro
1615 FAIL_IF(push_inst(compiler, (SCVTF ^ inv_bits) | VD(dst_r) | RN(src))); in sljit_emit_fop1_convd_fromw()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2219 defm SCVTF : IntegerToFP<0, "scvtf", sint_to_fp>;
2563 defm SCVTF : SIMDTwoVectorIntToFP<0, 0, 0b11101, "scvtf", sint_to_fp>;
2990 defm SCVTF : SIMDTwoScalarCVTSD< 0, 0, 0b11101, "scvtf", AArch64sitof>;
4197 defm SCVTF : SIMDScalarRShiftSD<0, 0b11100, "scvtf">;
4271 defm SCVTF: SIMDVectorRShiftSDToFP<0, 0b11100, "scvtf",
4442 // SCVTF GPR -> FPR is 9 cycles.
4443 // SCVTF FPR -> FPR is 4 cyclces.
4445 // Therefore, we can do 2 sign extensions and one SCVTF FPR -> FPR
4496 // SCVTF on floating point registers (both source and destination
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| D | AArch64SchedCyclone.td | 572 // SCVTF,UCVTF V,V
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