| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 779 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 167 case FCmpInst::FCMP_UNE: return ISD::SETUNE; in getFCmpCondCode()
176 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 46 case ISD::SETONE: case ISD::SETUNE:
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| D | R600ISelLowering.cpp | 454 case ISD::SETUNE: in LowerSELECT_CC()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 46 case ISD::SETONE: case ISD::SETUNE:
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| D | R600ISelLowering.cpp | 454 case ISD::SETUNE: in LowerSELECT_CC()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstructions.td | 88 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
123 [{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
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| D | R600ISelLowering.cpp | 1246 case ISD::SETUNE: in LowerSELECT_CC()
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| D | AMDGPUISelLowering.cpp | 968 case ISD::SETUNE: in CombineMinMax()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 600 case ISD::SETUNE: in getPredicateForSetCC()
636 case ISD::SETUNE: in getCRIdxForSetCC()
659 case ISD::SETUNE: in getVCmpInst()
842 case ISD::SETUNE: { in SelectSETCC()
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| D | PPCInstrInfo.td | 2817 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETUNE)),
2848 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETUNE)),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 312 case ISD::SETUNE: return "setune"; in getOperationName()
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| D | TargetLowering.cpp | 133 case ISD::SETUNE: in softenSetCCOperands()
1754 if (Cond == ISD::SETUNE && in SimplifySetCC()
1767 if (Cond == ISD::SETUNE && in SimplifySetCC()
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| D | LegalizeDAG.cpp | 1689 assert(TLI.getCondCodeAction(ISD::SETUNE, OpVT) in LegalizeSetCCCondCode()
1692 CC1 = ISD::SETUNE; CC2 = ISD::SETUNE; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
1700 case ISD::SETUNE: in LegalizeSetCCCondCode()
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| D | LegalizeFloatTypes.cpp | 1330 LHSHi, RHSHi, ISD::SETUNE); in FloatExpandSetCCOperands()
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| D | SelectionDAG.cpp | 316 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT in getSetCCOrOperation()
1815 case ISD::SETUNE: in FoldSetCC()
1876 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); in FoldSetCC()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 508 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
867 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1258 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1180 case ISD::SETUNE: CondCode = ARMCC::NE; break; in FPCCToARMCC()
3416 if (CC == ISD::SETUNE) { in checkVSELConstraints()
3595 else if (CC == ISD::SETUNE) in OptimizeVFPBrcond()
3647 CC == ISD::SETNE || CC == ISD::SETUNE)) { in LowerBR_CC()
4297 case ISD::SETUNE: in LowerVSETCC()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXVector.td | 978 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsMSAInstrInfo.td | 195 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
196 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
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| D | MipsSEISelLowering.cpp | 1819 Op->getOperand(2), ISD::SETUNE); in lowerINTRINSIC_WO_CHAIN()
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| D | MipsISelLowering.cpp | 470 case ISD::SETUNE: return Mips::FCOND_UNE; in condCodeToFCC()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1348 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 323 setCondCodeAction(ISD::SETUNE, MVT::f32, Expand); in resetOperationActions()
324 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in resetOperationActions()
325 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand); in resetOperationActions()
3620 case ISD::SETUNE: return X86::COND_INVALID; in TranslateX86CC()
12046 case ISD::SETUNE: in translateX86FSETCC()
13050 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETUNE) { in LowerBRCOND()
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