| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 350 SHL_PARTS, SRA_PARTS, SRL_PARTS, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 215 case ISD::SHL_PARTS: return "shl_parts"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 2084 PartsOpc = ISD::SHL_PARTS; in ExpandIntRes_Shift()
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| D | LegalizeDAG.cpp | 1320 case ISD::SHL_PARTS: in LegalizeOp()
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| D | SelectionDAG.cpp | 5018 case ISD::SHL_PARTS: in getNode()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 130 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
131 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 157 setOperationAction(ISD::SHL_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
160 setOperationAction(ISD::SHL_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
1345 assert(Op.getOpcode() == ISD::SHL_PARTS); in LowerShiftLeftParts()
1417 case ISD::SHL_PARTS: in LowerOperation()
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| /external/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 167 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in R600TargetLowering()
574 case ISD::SHL_PARTS: return LowerSHLParts(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1420 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1540 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1557 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 272 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in MipsTargetLowering()
799 case ISD::SHL_PARTS: return lowerShiftLeftParts(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 107 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 144 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
1588 case ISD::SHL_PARTS: in LowerOperation()
3754 assert(Op.getOpcode() == ISD::SHL_PARTS); in LowerShiftLeftParts()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 390 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); in PPCTargetLowering()
395 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in PPCTargetLowering()
6162 case ISD::SHL_PARTS: return LowerSHL_PARTS(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 622 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in ARMTargetLowering()
4049 assert(Op.getOpcode() == ISD::SHL_PARTS); in LowerShiftLeftParts()
6227 case ISD::SHL_PARTS: return LowerShiftLeftParts(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 217 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 587 setOperationAction(ISD::SHL_PARTS , MVT::i32 , Custom); in resetOperationActions()
591 setOperationAction(ISD::SHL_PARTS , MVT::i64 , Custom); in resetOperationActions()
10636 if (Op.getOpcode() == ISD::SHL_PARTS) { in LowerShiftParts()
10657 if (Op.getOpcode() == ISD::SHL_PARTS) { in LowerShiftParts()
16191 case ISD::SHL_PARTS: in LowerOperation()
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