| /external/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
36 assert(Stalls == 0 && "ARM hazards don't support scoreboard lookahead"); in getHazardType()
76 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); in getHazardType()
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| D | ARMHazardRecognizer.h | 40 HazardType getHazardType(SUnit *SU, int Stalls) override;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.h | 40 HazardType getHazardType(SUnit *SU, int Stalls) override;
79 virtual HazardType getHazardType(SUnit *SU, int Stalls) override;
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| D | PPCHazardRecognizers.cpp | 141 PPCDispatchGroupSBHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
142 if (Stalls == 0 && isLoadAfterStore(SU)) in getHazardType()
145 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); in getHazardType()
325 getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
326 assert(Stalls == 0 && "PPC hazards don't support scoreboard lookahead"); in getHazardType()
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| /external/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 119 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
124 int cycle = Stalls; in getHazardType()
146 assert((StageCycle - Stalls) < (int)RequiredScoreboard.getDepth() && in getHazardType()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ScheduleHazardRecognizer.h | 60 virtual HazardType getHazardType(SUnit *m, int Stalls = 0) {
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| D | ScoreboardHazardRecognizer.h | 117 HazardType getHazardType(SUnit *SU, int Stalls) override;
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| /external/oprofile/events/alpha/ev5/ |
| D | events | 24 event:0x10 counters:2 um:zero minimum:256 name:LONG_STALLS : Stalls longer than 15 cycles
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 650 int Stalls = 0; in AdvancePastStalls() local
653 HazardRec->getHazardType(SU, -Stalls); in AdvancePastStalls()
658 ++Stalls; in AdvancePastStalls()
660 AdvanceToCycle(CurCycle + Stalls); in AdvancePastStalls()
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| /external/oprofile/events/ppc64/power5++/ |
| D | event_mappings | 188 #Group 30 pm_lsu_stall1, LSU Stalls
194 #Group 31 pm_lsu_stall2, LSU Stalls
200 #Group 32 pm_fxu_stall, FXU Stalls
206 #Group 33 pm_fpu_stall, FPU Stalls
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| D | events | 199 #Group 30 pm_lsu_stall1, LSU Stalls
205 #Group 31 pm_lsu_stall2, LSU Stalls
211 #Group 32 pm_fxu_stall, FXU Stalls
217 #Group 33 pm_fpu_stall, FPU Stalls
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| /external/oprofile/events/ppc64/power5/ |
| D | event_mappings | 234 #Group 29 pm_lsu_stall1, LSU Stalls
242 #Group 30 pm_lsu_stall2, LSU Stalls
250 #Group 31 pm_fxu_stall, FXU Stalls
258 #Group 32 pm_fpu_stall, FPU Stalls
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| D | events | 244 #Group 29 pm_lsu_stall1, LSU Stalls
252 #Group 30 pm_lsu_stall2, LSU Stalls
260 #Group 31 pm_fxu_stall, FXU Stalls
268 #Group 32 pm_fpu_stall, FPU Stalls
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| /external/oprofile/events/ppc64/power5+/ |
| D | event_mappings | 242 #Group 30 pm_lsu_stall1, LSU Stalls
250 #Group 31 pm_lsu_stall2, LSU Stalls
258 #Group 32 pm_fxu_stall, FXU Stalls
266 #Group 33 pm_fpu_stall, FPU Stalls
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| D | events | 252 #Group 30 pm_lsu_stall1, LSU Stalls
260 #Group 31 pm_lsu_stall2, LSU Stalls
268 #Group 32 pm_fxu_stall, FXU Stalls
276 #Group 33 pm_fpu_stall, FPU Stalls
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| /external/blktrace/btreplay/doc/ |
| D | btreplay.tex | 495 Pre-bunch Stalls}
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| /external/oprofile/events/i386/nehalem/ |
| D | unit_masks | 239 0x40 mxcsr Stalls due to the MXCSR register rename occurring to close to a previous MXCSR rename
|