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Searched refs:TIED_TO (Results 1 – 15 of 15) sorted by relevance

/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h619 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
621 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
622 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
626 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
627 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) in getOperandBias()
631 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0) in getOperandBias()
DX86MCCodeEmitter.cpp1023 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1; in DetermineREXPrefix()
/external/llvm/lib/Target/X86/
DX86CodeEmitter.cpp176 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1; in determineREX()
840 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) == 0) in emitVEXOpcodePrefix()
842 else if (NumOps > 3 && Desc->getOperandConstraint(2, MCOI::TIED_TO) == 0) { in emitVEXOpcodePrefix()
843 assert(Desc->getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1); in emitVEXOpcodePrefix()
1038 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) == 0) in emitInstruction()
1040 else if (NumOps > 3 && Desc->getOperandConstraint(2, MCOI::TIED_TO) == 0) { in emitInstruction()
1041 assert(Desc->getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1); in emitInstruction()
DX86InstrInfo.cpp4088 MI->getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1; in foldMemoryOperandImpl()
4553 MI->getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1; in canFoldMemoryOperand()
/external/llvm/lib/Target/ARM/
DARMCodeEmitter.cpp1062 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitDataProcessingInstruction()
1142 if (!Skipped && MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitLoadStoreInstruction()
1213 if (!Skipped && MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitMiscLoadStoreInstruction()
1607 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitVFPArithInstruction()
1882 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON2RegInstruction()
1897 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON3RegInstruction()
1900 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON3RegInstruction()
/external/llvm/include/llvm/MC/
DMCInstrDesc.h32 TIED_TO = 0, // Must be allocated the same register as. enumerator
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp147 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstruction()
152 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstruction()
DMachineVerifier.cpp841 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
877 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in visitMachineOperand()
DRegAllocFast.cpp921 MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1; in AllocateBasicBlock()
DMachineInstr.cpp720 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp260 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
DScheduleDAGRRList.cpp1006 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
2689 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
2916 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1) in AddPseudoTwoAddrDeps()
DScheduleDAGSDNodes.cpp442 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
DInstrEmitter.cpp357 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1; in AddRegisterOperand()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp262 assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && in commuteInstruction()