/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 41 UXTH, enumerator 61 case AArch64_AM::UXTH: return "uxth"; in getShiftExtendName() 128 case 1: return AArch64_AM::UXTH; in getExtendType() 155 case AArch64_AM::UXTH: return 1; break; in getExtendEncoding()
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 521 # UXTB/UXTH
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D | basic-arm-instructions.txt | 2400 # UXTH
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D | thumb2.txt | 2672 # UXTH
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/external/vixl/test/ |
D | test-disasm-a64.cc | 340 COMPARE(add(w6, w7, Operand(w8, UXTH, 2)), "add w6, w7, w8, uxth #2"); in TEST() 352 COMPARE(add(x2, sp, Operand(x3, UXTH, 1)), "add x2, sp, w3, uxth #1"); in TEST() 366 COMPARE(sub(w6, w7, Operand(w8, UXTH, 2)), "sub w6, w7, w8, uxth #2"); in TEST() 375 COMPARE(cmp(x2, Operand(x3, UXTH, 3)), "cmp x2, w3, uxth #3"); in TEST() 378 COMPARE(sub(x2, sp, Operand(x3, UXTH, 1)), "sub x2, sp, w3, uxth #1"); in TEST()
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D | test-assembler-a64.cc | 272 __ Mvn(w12, Operand(w2, UXTH, 2)); in TEST() 438 __ Mov(w25, Operand(w13, UXTH, 2)); in TEST() 522 __ Orr(x7, x0, Operand(x1, UXTH, 1)); in TEST() 611 __ Orn(x7, x0, Operand(x1, UXTH, 1)); in TEST() 678 __ And(x7, x0, Operand(x1, UXTH, 1)); in TEST() 816 __ Bic(x7, x0, Operand(x1, UXTH, 1)); in TEST() 940 __ Eor(x7, x0, Operand(x1, UXTH, 1)); in TEST() 1007 __ Eon(x7, x0, Operand(x1, UXTH, 1)); in TEST() 2974 __ Add(x12, x0, Operand(x1, UXTH, 2)); in TEST() 3157 __ Neg(w11, Operand(w0, UXTH, 2)); in TEST() [all …]
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/external/chromium_org/v8/test/cctest/ |
D | test-disasm-arm64.cc | 379 COMPARE(add(w6, w7, Operand(w8, UXTH, 2)), "add w6, w7, w8, uxth #2"); in TEST_() 391 COMPARE(add(x2, csp, Operand(x3, UXTH, 1)), "add x2, csp, w3, uxth #1"); in TEST_() 405 COMPARE(sub(w6, w7, Operand(w8, UXTH, 2)), "sub w6, w7, w8, uxth #2"); in TEST_() 414 COMPARE(cmp(x2, Operand(x3, UXTH, 3)), "cmp x2, w3, uxth #3"); in TEST_() 417 COMPARE(sub(x2, csp, Operand(x3, UXTH, 1)), "sub x2, csp, w3, uxth #1"); in TEST_()
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D | test-assembler-arm64.cc | 307 __ Mvn(w12, Operand(w2, UXTH, 2)); in TEST() 380 __ Mov(w25, Operand(w13, UXTH, 2)); in TEST() 563 __ Orr(x7, x0, Operand(x1, UXTH, 1)); in TEST() 660 __ Orn(x7, x0, Operand(x1, UXTH, 1)); in TEST() 729 __ And(x7, x0, Operand(x1, UXTH, 1)); in TEST() 870 __ Bic(x7, x0, Operand(x1, UXTH, 1)); in TEST() 998 __ Eor(x7, x0, Operand(x1, UXTH, 1)); in TEST() 1067 __ Eon(x7, x0, Operand(x1, UXTH, 1)); in TEST() 3650 __ Add(x12, x0, Operand(x1, UXTH, 2)); in TEST() 3845 __ Neg(w11, Operand(w0, UXTH, 2)); in TEST() [all …]
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/external/llvm/test/MC/ARM/ |
D | basic-thumb-instructions.s | 656 @ UXTB/UXTH
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D | basic-arm-instructions.s | 2917 @ UXTH
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D | basic-thumb2-instructions.s | 3599 @ UXTH
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 459 UXTH, enumerator
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/external/vixl/src/a64/ |
D | constants-a64.h | 233 UXTH = 1, enumerator
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D | simulator-a64.cc | 338 case UXTH: in ExtendValue()
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D | assembler-a64.cc | 1786 case UXTH: in EmitExtendShift()
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/external/chromium_org/v8/src/arm64/ |
D | constants-arm64.h | 343 UXTH = 1, enumerator
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D | assembler-arm64.cc | 2401 case UXTH: in EmitExtendShift()
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D | simulator-arm64.cc | 926 case UXTH: in ExtendValue()
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/external/pcre/dist/sljit/ |
D | sljitNativeARM_T2_32.c | 167 #define UXTH 0xb280 macro 707 return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2)); in emit_op_imm()
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D | sljitNativeARM_32.c | 124 #define UXTH 0xe6ff0070 macro 1046 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2)); in emit_single_op()
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 2650 /* 16 bit zext */ { ARM::UXTH , 0, ARM_AM::no_shift, 0 } } in ARMEmitIntExt() 2890 { { ARM::UXTH, ARM::t2UXTH }, 0, 1, MVT::i16 },
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D | ARMScheduleSwift.td | 1194 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
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D | ARMInstrInfo.td | 3296 def UXTH : AI_ext_rrot<0b01101111, 5324 def : ARMV6Pat<(and GPR:$Src, 0x0000FFFF), (UXTH GPR:$Src, 0)>; 5452 (UXTH GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p)>;
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 952 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || in isExtend() 2286 .Case("uxth", AArch64_AM::UXTH) in tryParseOptionalShiftExtend()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 366 return AArch64_AM::UXTH; in getExtendTypeForNode() 384 return !IsLoadStore ? AArch64_AM::UXTH : AArch64_AM::InvalidShiftExtend; in getExtendTypeForNode()
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