Home
last modified time | relevance | path

Searched refs:UXTH (Results 1 – 25 of 26) sorted by relevance

12

/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AddressingModes.h41 UXTH, enumerator
61 case AArch64_AM::UXTH: return "uxth"; in getShiftExtendName()
128 case 1: return AArch64_AM::UXTH; in getExtendType()
155 case AArch64_AM::UXTH: return 1; break; in getExtendEncoding()
/external/llvm/test/MC/Disassembler/ARM/
Dthumb1.txt521 # UXTB/UXTH
Dbasic-arm-instructions.txt2400 # UXTH
Dthumb2.txt2672 # UXTH
/external/vixl/test/
Dtest-disasm-a64.cc340 COMPARE(add(w6, w7, Operand(w8, UXTH, 2)), "add w6, w7, w8, uxth #2"); in TEST()
352 COMPARE(add(x2, sp, Operand(x3, UXTH, 1)), "add x2, sp, w3, uxth #1"); in TEST()
366 COMPARE(sub(w6, w7, Operand(w8, UXTH, 2)), "sub w6, w7, w8, uxth #2"); in TEST()
375 COMPARE(cmp(x2, Operand(x3, UXTH, 3)), "cmp x2, w3, uxth #3"); in TEST()
378 COMPARE(sub(x2, sp, Operand(x3, UXTH, 1)), "sub x2, sp, w3, uxth #1"); in TEST()
Dtest-assembler-a64.cc272 __ Mvn(w12, Operand(w2, UXTH, 2)); in TEST()
438 __ Mov(w25, Operand(w13, UXTH, 2)); in TEST()
522 __ Orr(x7, x0, Operand(x1, UXTH, 1)); in TEST()
611 __ Orn(x7, x0, Operand(x1, UXTH, 1)); in TEST()
678 __ And(x7, x0, Operand(x1, UXTH, 1)); in TEST()
816 __ Bic(x7, x0, Operand(x1, UXTH, 1)); in TEST()
940 __ Eor(x7, x0, Operand(x1, UXTH, 1)); in TEST()
1007 __ Eon(x7, x0, Operand(x1, UXTH, 1)); in TEST()
2974 __ Add(x12, x0, Operand(x1, UXTH, 2)); in TEST()
3157 __ Neg(w11, Operand(w0, UXTH, 2)); in TEST()
[all …]
/external/chromium_org/v8/test/cctest/
Dtest-disasm-arm64.cc379 COMPARE(add(w6, w7, Operand(w8, UXTH, 2)), "add w6, w7, w8, uxth #2"); in TEST_()
391 COMPARE(add(x2, csp, Operand(x3, UXTH, 1)), "add x2, csp, w3, uxth #1"); in TEST_()
405 COMPARE(sub(w6, w7, Operand(w8, UXTH, 2)), "sub w6, w7, w8, uxth #2"); in TEST_()
414 COMPARE(cmp(x2, Operand(x3, UXTH, 3)), "cmp x2, w3, uxth #3"); in TEST_()
417 COMPARE(sub(x2, csp, Operand(x3, UXTH, 1)), "sub x2, csp, w3, uxth #1"); in TEST_()
Dtest-assembler-arm64.cc307 __ Mvn(w12, Operand(w2, UXTH, 2)); in TEST()
380 __ Mov(w25, Operand(w13, UXTH, 2)); in TEST()
563 __ Orr(x7, x0, Operand(x1, UXTH, 1)); in TEST()
660 __ Orn(x7, x0, Operand(x1, UXTH, 1)); in TEST()
729 __ And(x7, x0, Operand(x1, UXTH, 1)); in TEST()
870 __ Bic(x7, x0, Operand(x1, UXTH, 1)); in TEST()
998 __ Eor(x7, x0, Operand(x1, UXTH, 1)); in TEST()
1067 __ Eon(x7, x0, Operand(x1, UXTH, 1)); in TEST()
3650 __ Add(x12, x0, Operand(x1, UXTH, 2)); in TEST()
3845 __ Neg(w11, Operand(w0, UXTH, 2)); in TEST()
[all …]
/external/llvm/test/MC/ARM/
Dbasic-thumb-instructions.s656 @ UXTB/UXTH
Dbasic-arm-instructions.s2917 @ UXTH
Dbasic-thumb2-instructions.s3599 @ UXTH
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h459 UXTH, enumerator
/external/vixl/src/a64/
Dconstants-a64.h233 UXTH = 1, enumerator
Dsimulator-a64.cc338 case UXTH: in ExtendValue()
Dassembler-a64.cc1786 case UXTH: in EmitExtendShift()
/external/chromium_org/v8/src/arm64/
Dconstants-arm64.h343 UXTH = 1, enumerator
Dassembler-arm64.cc2401 case UXTH: in EmitExtendShift()
Dsimulator-arm64.cc926 case UXTH: in ExtendValue()
/external/pcre/dist/sljit/
DsljitNativeARM_T2_32.c167 #define UXTH 0xb280 macro
707 return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2)); in emit_op_imm()
DsljitNativeARM_32.c124 #define UXTH 0xe6ff0070 macro
1046 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2)); in emit_single_op()
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp2650 /* 16 bit zext */ { ARM::UXTH , 0, ARM_AM::no_shift, 0 } } in ARMEmitIntExt()
2890 { { ARM::UXTH, ARM::t2UXTH }, 0, 1, MVT::i16 },
DARMScheduleSwift.td1194 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
DARMInstrInfo.td3296 def UXTH : AI_ext_rrot<0b01101111,
5324 def : ARMV6Pat<(and GPR:$Src, 0x0000FFFF), (UXTH GPR:$Src, 0)>;
5452 (UXTH GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p)>;
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp952 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || in isExtend()
2286 .Case("uxth", AArch64_AM::UXTH) in tryParseOptionalShiftExtend()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp366 return AArch64_AM::UXTH; in getExtendTypeForNode()
384 return !IsLoadStore ? AArch64_AM::UXTH : AArch64_AM::InvalidShiftExtend; in getExtendTypeForNode()

12