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Searched refs:VECTOR_SHUFFLE (Results 1 – 24 of 24) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp454 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1}, in getShuffleCost()
455 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
456 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost()
457 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
459 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2}, in getShuffleCost()
460 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2}, in getShuffleCost()
461 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2}, in getShuffleCost()
462 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}}; in getShuffleCost()
466 int Idx = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second); in getShuffleCost()
477 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
[all …]
DARMISelLowering.cpp116 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in addTypeForNEON()
560 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in ARMTargetLowering()
6235 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
9639 case ISD::VECTOR_SHUFFLE: return PerformVECTOR_SHUFFLECombine(N, DCI.DAG); in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp434 {ISD::VECTOR_SHUFFLE, MVT::v4i64, 1}, // vblendpd in getShuffleCost()
435 {ISD::VECTOR_SHUFFLE, MVT::v4f64, 1}, // vblendpd in getShuffleCost()
437 {ISD::VECTOR_SHUFFLE, MVT::v8i32, 1}, // vblendps in getShuffleCost()
438 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps in getShuffleCost()
442 {ISD::VECTOR_SHUFFLE, MVT::v16i16, 5}, in getShuffleCost()
446 {ISD::VECTOR_SHUFFLE, MVT::v32i8, 9} in getShuffleCost()
450 int Idx = CostTableLookup(AVXAltShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second); in getShuffleCost()
457 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost()
458 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
462 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1}, in getShuffleCost()
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DX86InstrFragmentsSIMD.td182 // Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
DX86ISelLowering.cpp820 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in resetOperationActions()
935 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom); in resetOperationActions()
994 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in resetOperationActions()
1000 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); in resetOperationActions()
1001 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); in resetOperationActions()
1299 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in resetOperationActions()
1471 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in resetOperationActions()
1558 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in resetOperationActions()
5789 case ISD::VECTOR_SHUFFLE: { in LowerVectorBroadcast()
8322 if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE && Subtarget->hasSSE2()) { in LowerVECTOR_SHUFFLEv8i16()
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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h284 VECTOR_SHUFFLE, enumerator
DSelectionDAGNodes.h1307 : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {
1334 return N->getOpcode() == ISD::VECTOR_SHUFFLE;
/external/llvm/lib/Target/R600/
DSIISelLowering.cpp72 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); in SITargetLowering()
73 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand); in SITargetLowering()
74 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i32, Expand); in SITargetLowering()
75 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16f32, Expand); in SITargetLowering()
DAMDGPUISelLowering.cpp326 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering()
356 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering()
/external/llvm/test/CodeGen/ARM/
Dvext.ll165 ; this rather than blindly emitting a VECTOR_SHUFFLE (infinite
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp203 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; in getOperationName()
DLegalizeVectorTypes.cpp68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break; in ScalarizeVectorResult()
580 case ISD::VECTOR_SHUFFLE: in SplitVectorResult()
1566 case ISD::VECTOR_SHUFFLE: in WidenVectorResult()
DSelectionDAG.cpp531 case ISD::VECTOR_SHUFFLE: { in AddNodeIDCustom()
1578 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops); in getVectorShuffle()
3584 case ISD::VECTOR_SHUFFLE: in getNode()
DDAGCombiner.cpp1269 case ISD::VECTOR_SHUFFLE: return visitVECTOR_SHUFFLE(N); in visit()
2529 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in SimplifyBinOpWithSameOpcodeHands()
9889 if (InVec.getOpcode() == ISD::VECTOR_SHUFFLE in visitEXTRACT_VECTOR_ELT()
10232 !TLI.isOperationLegalOrCustom(ISD::VECTOR_SHUFFLE, VT)) in visitBUILD_VECTOR()
10681 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG && in visitVECTOR_SHUFFLE()
DLegalizeDAG.cpp3315 case ISD::VECTOR_SHUFFLE: { in ExpandNode()
4270 case ISD::VECTOR_SHUFFLE: { in PromoteNode()
DLegalizeIntegerTypes.cpp84 case ISD::VECTOR_SHUFFLE: in PromoteIntegerResult()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp166 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in InitAMDILLowering()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp166 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in InitAMDILLowering()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1390 case ShuffleVector: return ISD::VECTOR_SHUFFLE; in InstructionOpcodeToISD()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp412 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote); in PPCTargetLowering()
413 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8); in PPCTargetLowering()
483 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); in PPCTargetLowering()
575 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Legal); in PPCTargetLowering()
597 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal); in PPCTargetLowering()
6168 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
DPPCISelDAGToDAG.cpp1349 case ISD::VECTOR_SHUFFLE: in Select()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp271 setOperationAction(ISD::VECTOR_SHUFFLE, Ty, Custom); in addMSAIntType()
374 case ISD::VECTOR_SHUFFLE: return lowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td459 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp512 setOperationAction(ISD::VECTOR_SHUFFLE, VT.getSimpleVT(), Custom); in addTypeForNEON()
1580 case ISD::VECTOR_SHUFFLE: in LowerOperation()