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Searched refs:VirtRegMap (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/lib/CodeGen/
DVirtRegMap.cpp51 char VirtRegMap::ID = 0;
53 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
55 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
69 void VirtRegMap::grow() { in grow()
76 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
83 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
92 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
101 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
109 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
119 void VirtRegMap::print(raw_ostream &OS, const Module*) const { in print()
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DSpiller.h18 class VirtRegMap; variable
37 VirtRegMap &vrm);
43 VirtRegMap &vrm);
DRegAllocBase.h47 class VirtRegMap; variable
63 VirtRegMap *VRM;
74 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DSplitKit.h36 class VirtRegMap; variable
45 const VirtRegMap &VRM;
120 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
214 VirtRegMap &VRM;
353 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
DSpiller.cpp54 VirtRegMap *vrm;
62 SpillerBase(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm) in SpillerBase()
163 VirtRegMap &vrm) in TrivialSpiller()
178 VirtRegMap &vrm) { in createSpiller()
DLiveDebugVariables.h32 class VirtRegMap; variable
59 void emitDebugValues(VirtRegMap *VRM);
DAllocationOrder.h26 class VirtRegMap; variable
39 const VirtRegMap &VRM,
DLiveRegMatrix.cpp36 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
46 AU.addRequiredTransitive<VirtRegMap>(); in getAnalysisUsage()
54 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
DRegAllocBasic.cpp152 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
153 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
276 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
DLiveDebugVariables.cpp263 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
266 void emitDebugValues(VirtRegMap *VRM,
356 void emitDebugValues(VirtRegMap *VRM);
873 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { in rewriteLocations()
889 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { in rewriteLocations()
945 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, in emitDebugValues()
978 void LDVImpl::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
991 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
DAllocationOrder.cpp31 const VirtRegMap &VRM, in AllocationOrder()
DRegAllocPBQP.cpp134 VirtRegMap *vrm;
435 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
436 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
546 vrm = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
DRegAllocBase.cpp57 void RegAllocBase::init(VirtRegMap &vrm, in init()
DCMakeLists.txt116 VirtRegMap.cpp
DAndroid.mk118 VirtRegMap.cpp
DInlineSpiller.cpp66 VirtRegMap &VRM;
144 VirtRegMap &vrm) in InlineSpiller()
195 VirtRegMap &vrm) { in createInlineSpiller()
1311 if (StackSlot == VirtRegMap::NO_STACK_SLOT) { in spillAll()
DTargetRegisterInfo.cpp268 const VirtRegMap *VRM) const { in getRegAllocationHints()
DRegAllocGreedy.cpp440 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
441 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
2333 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
/external/llvm/include/llvm/CodeGen/
DVirtRegMap.h32 class VirtRegMap : public MachineFunctionPass {
66 VirtRegMap(const VirtRegMap&) LLVM_DELETED_FUNCTION;
67 void operator=(const VirtRegMap&) LLVM_DELETED_FUNCTION;
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DLiveRegMatrix.h37 class VirtRegMap; variable
43 VirtRegMap *VRM;
DLiveRangeEdit.h34 class VirtRegMap; variable
64 VirtRegMap *VRM;
118 VirtRegMap *vrm,
DLiveIntervalAnalysis.h47 class VirtRegMap; variable
289 void addKillFlags(const VirtRegMap*);
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h33 class VirtRegMap; variable
654 const VirtRegMap *VRM = nullptr) const;
/external/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h136 const VirtRegMap *VRM) const override;
DARMBaseRegisterInfo.cpp221 const VirtRegMap *VRM) const { in getRegAllocationHints()

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