/external/chromium_org/third_party/boringssl/src/crypto/chacha/ |
D | chacha_generic.c | 27 #define XOR(v, w) ((v) ^ (w)) macro 45 x[a] = PLUS(x[a],x[b]); x[d] = ROTATE(XOR(x[d],x[a]),16); \ 46 x[c] = PLUS(x[c],x[d]); x[b] = ROTATE(XOR(x[b],x[c]),12); \ 47 x[a] = PLUS(x[a],x[b]); x[d] = ROTATE(XOR(x[d],x[a]), 8); \ 48 x[c] = PLUS(x[c],x[d]); x[b] = ROTATE(XOR(x[b],x[c]), 7);
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/external/llvm/test/CodeGen/SystemZ/ |
D | atomicrmw-xor-02.ll | 7 ; Check XOR of a variable. 48 ; Check the minimum signed value. We XOR the rotated word with 0x80000000. 77 ; Check XORs of -1. We XOR the rotated word with 0xffff0000. 91 ; Check XORs of 1. We XOR the rotated word with 0x00010000. 105 ; Check the maximum signed value. We XOR the rotated word with 0x7fff0000. 119 ; Check XORs of a large unsigned value. We XOR the rotated word with
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D | atomicrmw-xor-01.ll | 7 ; Check XOR of a variable. 48 ; Check the minimum signed value. We XOR the rotated word with 0x80000000. 77 ; Check XORs of -1. We XOR the rotated word with 0xff000000. 91 ; Check XORs of 1. We XOR the rotated word with 0x01000000. 105 ; Check the maximum signed value. We XOR the rotated word with 0x7f000000. 119 ; Check XORs of a large unsigned value. We XOR the rotated word with
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D | atomicrmw-xor-06.ll | 5 ; Check XOR of a variable. 14 ; Check XOR of 1, which needs a temporary.
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D | rxsbg-01.ll | 65 ; Test a case with just a rotate (using XOR for the rotate combination too, 114 ; Check the handling of zext and XOR, which can use ROSBG.
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D | xor-07.ll | 1 ; Test the three-operand forms of XOR.
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D | int-add-09.ll | 5 ; Check additions of 1. The XOR ensures that we don't instead load the
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/external/llvm/lib/Target/Mips/ |
D | MipsCondMov.td | 204 defm : MovzPats1<GPR32, GPR32, MOVZ_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6; 213 defm : MovzPats1<GPR32, GPR64, MOVZ_I_I64, XOR>, 226 defm : MovnPats<GPR32, GPR32, MOVN_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6; 228 defm : MovnPats<GPR32, GPR64, MOVN_I_I64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6, 237 defm : MovzPats1<GPR32, FGR32, MOVZ_I_S, XOR>, INSN_MIPS4_32_NOT_32R6_64R6; 238 defm : MovnPats<GPR32, FGR32, MOVN_I_S, XOR>, INSN_MIPS4_32_NOT_32R6_64R6; 249 defm : MovzPats1<GPR32, AFGR64, MOVZ_I_D32, XOR>, INSN_MIPS4_32_NOT_32R6_64R6, 251 defm : MovnPats<GPR32, AFGR64, MOVN_I_D32, XOR>, INSN_MIPS4_32_NOT_32R6_64R6, 258 defm : MovzPats1<GPR32, FGR64, MOVZ_I_D64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6, 262 defm : MovnPats<GPR32, FGR64, MOVN_I_D64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6,
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/external/iptables/extensions/ |
D | libxt_CONNMARK.man | 5 Zero out the bits given by \fImask\fP and XOR \fIvalue\fP into the ctmark. 14 nfmark to XOR into the ctmark. \fIctmask\fP and \fInfmask\fP default to 24 ctmark to XOR into the nfmark. \fIctmask\fP and \fInfmask\fP default to 40 Binary XOR the ctmark with \fIbits\fP. (Mnemonic for \fB\-\-set\-xmark\fP
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
D | RegOps.java | 110 public static final int XOR = 22; field in RegOps 335 case XOR: return "xor"; in opName()
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D | DexTranslationAdvice.java | 85 case RegOps.XOR: in hasConstantOperation()
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/external/checkpolicy/ |
D | policy_scan.l | 161 XOR { return(XOR); } 259 "^" { return (XOR); }
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/external/pcre/dist/sljit/ |
D | sljitNativeMIPS_32.c | 177 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 193 …FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FL… in emit_single_op() 194 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 250 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 269 …FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FL… in emit_single_op() 270 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 324 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
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D | sljitNativeMIPS_64.c | 269 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 285 …FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FL… in emit_single_op() 286 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 342 FAIL_IF(push_inst(compiler, XOR | S(src1) | T(src2) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 361 …FAIL_IF(push_inst(compiler, XOR | S(TMP_REG1) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FL… in emit_single_op() 362 FAIL_IF(push_inst(compiler, XOR | S(dst) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG)); in emit_single_op() 419 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
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/external/valgrind/main/none/tests/mips64/ |
D | logical_instructions.c | 7 OR, ORI, XOR, XORI enumerator 80 case XOR: in main()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 509 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); in LowerSDIV24() 617 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 620 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSDIV32() 626 r10 = DAG.getNode(ISD::XOR, DL, OVT, r10, r11); in LowerSDIV32() 632 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 719 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32() 722 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSREM32() 737 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 509 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); in LowerSDIV24() 617 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 620 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSDIV32() 626 r10 = DAG.getNode(ISD::XOR, DL, OVT, r10, r11); in LowerSDIV32() 632 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 719 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32() 722 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSREM32() 737 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32()
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/external/proguard/src/proguard/evaluation/value/ |
D | CompositeIntegerValue.java | 41 public static final byte XOR = '^'; field in CompositeIntegerValue
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D | CompositeLongValue.java | 41 public static final byte XOR = '^'; field in CompositeLongValue
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/util/ |
D | SyntheticAccessorFSM.java | 200 public static final int XOR = SyntheticAccessorResolver.XOR_ASSIGNMENT; field in SyntheticAccessorFSM 416 mathOp = XOR; in test()
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/external/llvm/test/Transforms/InstCombine/ |
D | bit-tracking.ll | 6 ; Reduce down to a single XOR
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D | apint-add2.ll | 33 ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
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/external/dexmaker/src/main/java/com/google/dexmaker/ |
D | BinaryOp.java | 90 XOR() { in XOR() enumConstant
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/external/llvm/test/CodeGen/X86/ |
D | combine-vec-shuffle.ll | 7 ; fold (XOR (shuf (A, C), shuf (B, C)) -> shuf (XOR (A, B), V_0) 11 ; fold (XOR (shuf (C, A), shuf (C, B)) -> shuf (V_0, XOR (A, B))
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 319 setOperationAction(ISD::XOR, VT, Expand); in AMDGPUTargetLowering() 1268 DstMask = DAG.getNode(ISD::XOR, DL, MVT::i32, DstMask, in LowerSTORE() 1298 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); in LowerSDIV24() 1406 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 1409 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSDIV32() 1415 r10 = DAG.getNode(ISD::XOR, DL, OVT, r10, r11); in LowerSDIV32() 1421 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32() 1486 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32() 1489 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSREM32() 1504 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32() [all …]
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