Searched refs:Xri (Results 1 – 4 of 4) sorted by relevance
/external/valgrind/main/VEX/priv/ |
D | host_x86_defs.c | 317 op->Xri.Imm.imm32 = imm32; in X86RI_Imm() 323 op->Xri.Reg.reg = reg; in X86RI_Reg() 330 vex_printf("$0x%x", op->Xri.Imm.imm32); in ppX86RI() 333 ppHRegX86(op->Xri.Reg.reg); in ppX86RI() 348 addHRegUse(u, HRmRead, op->Xri.Reg.reg); in addRegUsage_X86RI() 360 op->Xri.Reg.reg = lookupHRegRemap(m, op->Xri.Reg.reg); in mapRegs_X86RI() 2239 p = doAMode_M(p, i->Xin.Alu32M.src->Xri.Reg.reg, in emit_X86Instr() 2245 p = emit32(p, i->Xin.Alu32M.src->Xri.Imm.imm32); in emit_X86Instr() 2263 p = doAMode_M(p, i->Xin.Alu32M.src->Xri.Reg.reg, in emit_X86Instr() 2267 if (fits8bits(i->Xin.Alu32M.src->Xri.Imm.imm32)) { in emit_X86Instr() [all …]
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D | host_x86_defs.h | 202 Xri; member
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D | host_x86_isel.c | 1695 vassert(hregClass(ri->Xri.Reg.reg) == HRcInt32); in iselIntExpr_RI() 1696 vassert(hregIsVirtual(ri->Xri.Reg.reg)); in iselIntExpr_RI()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 1633 def Xri : BaseAddSubImm<isSub, 0, GPR64sp, GPR64sp, addsub_shifted_imm64, 1699 def Xri : BaseAddSubImm<isSub, 1, GPR64, GPR64sp, addsub_shifted_imm64, 1741 def : InstAlias<cmp#" $src, $imm", (!cast<Instruction>(NAME#"Xri") 1853 def Xri : BaseBitfieldImm<opc, GPR64, imm0_63, asm> { 1887 def Xri : BaseBitfieldImmWith2RegArgs<opc, GPR64, imm0_63, asm> { 1960 def Xri : BaseLogicalImm<opc, GPR64sp, GPR64, logical_imm64, mnemonic, 1970 (!cast<Instruction>(NAME # "Xri") GPR64sp:$Rd, GPR64:$Rn, 1982 def Xri : BaseLogicalImm<opc, GPR64, GPR64, logical_imm64, mnemonic, 1992 (!cast<Instruction>(NAME # "Xri") GPR64:$Rd, GPR64:$Rn,
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