| /external/chromium_org/media/audio/ |
| D | sample_rates.cc | 11 bool ToAudioSampleRate(int sample_rate, AudioSampleRate* asr) { in ToAudioSampleRate() argument
12 DCHECK(asr); in ToAudioSampleRate()
15 *asr = k8000Hz; in ToAudioSampleRate()
18 *asr = k16000Hz; in ToAudioSampleRate()
21 *asr = k32000Hz; in ToAudioSampleRate()
24 *asr = k48000Hz; in ToAudioSampleRate()
27 *asr = k96000Hz; in ToAudioSampleRate()
30 *asr = k11025Hz; in ToAudioSampleRate()
33 *asr = k22050Hz; in ToAudioSampleRate()
36 *asr = k44100Hz; in ToAudioSampleRate()
[all …]
|
| /external/valgrind/main/none/tests/arm/ |
| D | v6intThumb.stdout.exp | 2153 adds.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2154 adds.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2155 adds.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2156 adds.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2165 add.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2166 add.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2167 add.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2168 add.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2177 adds.w r1, r2, r3, asr #0 :: rd 0xc859704f rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000…
2178 adds.w r1, r2, r3, asr #1 :: rd 0xfccd64bb rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000…
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | atomic-dagsched.ll | 15 %asr.iv6 = phi i8* [ %29, %test.exit ], [ %scevgep, %entry ]
35 %asr.iv9 = phi i8* [ %scevgep10, %vector_kernel_entry.i ], [ %asr.iv6, %dim_0_vector_pre_head.i ]
36 …%asr.iv = phi i64 [ %asr.iv.next, %vector_kernel_entry.i ], [ %vector.size.i, %dim_0_vector_pre_he…
38 %asr.iv911 = addrspacecast i8* %asr.iv9 to <8 x i32> addrspace(1)*
39 %9 = load <8 x i32> addrspace(1)* %asr.iv911, align 4
56 store <8 x i32> %vectorvector_func.i, <8 x i32> addrspace(1)* %asr.iv911, align 4
57 %asr.iv.next = add i64 %asr.iv, -1
58 %scevgep10 = getelementptr i8* %asr.iv9, i64 32
59 %dim_0_vector_cmp.to.max.i = icmp eq i64 %asr.iv.next, 0
75 %asr.iv12 = phi i64 [ %asr.iv.next13, %scalar_kernel_entry.i ], [ %22, %dim_0_pre_head.i ]
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | arm-shift-encoding.s | 8 ldr r0, [r0, r0, asr #32]
9 ldr r0, [r0, r0, asr #16]
18 @ CHECK: ldr r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x90,0xe7]
19 @ CHECK: ldr r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x90,0xe7]
28 pld [r0, r0, asr #32]
29 pld [r0, r0, asr #16]
38 @ CHECK: [r0, r0, asr #32] @ encoding: [0x40,0xf0,0xd0,0xf7]
39 @ CHECK: [r0, r0, asr #16] @ encoding: [0x40,0xf8,0xd0,0xf7]
48 str r0, [r0, r0, asr #32]
49 str r0, [r0, r0, asr #16]
[all …]
|
| D | thumb-shift-encoding.s | 12 sbc.w r5, r4, r11, asr #32
13 sbc.w r6, r3, sp, asr #16
22 @ CHECK: sbc.w r5, r4, r11, asr #32 @ encoding: [0x64,0xeb,0x2b,0x05]
23 @ CHECK: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 and.w r5, r4, r11, asr #32
33 and.w r6, r3, sp, asr #16
42 @ CHECK: and.w r5, r4, r11, asr #32 @ encoding: [0x04,0xea,0x2b,0x05]
43 @ CHECK: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
|
| D | basic-arm-instructions.s | 56 adc r4, r5, r6, asr #1
57 adc r4, r5, r6, asr #31
58 adc r4, r5, r6, asr #32
65 adc r6, r7, r8, asr r9
76 adc r4, r5, asr #1
77 adc r4, r5, asr #31
78 adc r4, r5, asr #32
84 adc r6, r7, asr r9
95 @ CHECK: adc r4, r5, r6, asr #1 @ encoding: [0xc6,0x40,0xa5,0xe0]
96 @ CHECK: adc r4, r5, r6, asr #31 @ encoding: [0xc6,0x4f,0xa5,0xe0]
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-logical-encoding.s | 56 and w1, w2, w3, asr #2
57 and x1, x2, x3, asr #2
67 ; CHECK: and w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x0a]
68 ; CHECK: and x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0x8a]
78 ands w1, w2, w3, asr #2
79 ands x1, x2, x3, asr #2
89 ; CHECK: ands w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x6a]
90 ; CHECK: ands x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0xea]
100 bic w1, w2, w3, asr #3
101 bic x1, x2, x3, asr #3
[all …]
|
| D | basic-a64-diagnostics.s | 185 add x4, sp, x9, asr #5
201 add w1, w2, w3, asr #-1
202 add w1, w2, w3, asr #32
207 add x1, x2, x3, asr #-1
208 add x1, x2, x3, asr #64
250 adds w1, w2, w3, asr #-1
251 adds w1, w2, w3, asr #32
256 adds x1, x2, x3, asr #-1
257 adds x1, x2, x3, asr #64
299 sub w1, w2, w3, asr #-1
[all …]
|
| /external/compiler-rt/lib/builtins/arm/ |
| D | divmodsi4.S | 51 eor ip, r0, r0, asr #31
52 eor lr, r1, r1, asr #31
53 sub r0, ip, r0, asr #31
54 sub r1, lr, r1, asr #31
59 eor r0, r0, r4, asr #31
60 eor r1, r1, r5, asr #31
61 sub r0, r0, r4, asr #31
62 sub r1, r1, r5, asr #31
|
| D | modsi3.S | 45 eor r2, r0, r0, asr #31
46 eor r3, r1, r1, asr #31
47 sub r0, r2, r0, asr #31
48 sub r1, r3, r1, asr #31
52 eor r0, r0, r4, asr #31
53 sub r0, r0, r4, asr #31
|
| D | divsi3.S | 46 eor r2, r0, r0, asr #31
47 eor r3, r1, r1, asr #31
48 sub r0, r2, r0, asr #31
49 sub r1, r3, r1, asr #31
53 eor r0, r0, r4, asr #31
54 sub r0, r0, r4, asr #31
|
| D | comparesf2.S | 80 mvnlo r0, r1, asr #31
87 movhi r0, r1, asr #31
122 mvnlo r0, r1, asr #31
124 movhi r0, r1, asr #31
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| D | iwalsh_v6.asm | 71 asr r12, r3, #19 ; [0]
73 asr lr, r2, #19 ; [1]
77 asr r2, r2, #3 ; [2]
79 asr r3, r3, #3 ; [3]
82 asr r12, r5, #19 ; [4]
84 asr lr, r4, #19 ; [5]
88 asr r4, r4, #3 ; [6]
90 asr r5, r5, #3 ; [7]
108 asr r12, r7, #19 ; [8]
110 asr lr, r6, #19 ; [9]
[all …]
|
| D | intra4x4_predict_v6.asm | 67 mov r12, r4, asr #3 ; (expected_dc + 4) >> 3
159 add r0, r0, r4, asr #16 ;[a[4]+2 | a[2]+2]
163 and r9, r11, r9, asr #2
164 and r4, r11, r4, asr #2
201 pkhtb r8, r8, r8, asr #16 ; l[-|0|-|0]
202 pkhtb r9, r9, r9, asr #16 ; l[-|1|-|1]
203 pkhtb r10, r10, r10, asr #16 ; l[-|2|-|2]
204 pkhtb r11, r11, r11, asr #16 ; l[-|3|-|3]
243 pkhtb r7, r9, r8, asr #16
249 add r7, r7, r8, asr #15 ; [ a5+2*a6]
[all …]
|
| D | dequant_idct_v6.asm | 110 pkhtb r6, r6, r8, asr #16
115 pkhtb r8, r7, r9, asr #16
137 mov r8, r7, asr #3
138 pkhtb r9, r8, r10, asr #19
139 mov r8, r1, asr #3
140 pkhtb r8, r8, r6, asr #19
153 mov r7, r7, asr #3
154 pkhtb r7, r7, r10, asr #19
155 mov r1, r1, asr #3
156 pkhtb r1, r1, r6, asr #19
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/arm/armv6/ |
| D | iwalsh_v6.asm | 71 asr r12, r3, #19 ; [0]
73 asr lr, r2, #19 ; [1]
77 asr r2, r2, #3 ; [2]
79 asr r3, r3, #3 ; [3]
82 asr r12, r5, #19 ; [4]
84 asr lr, r4, #19 ; [5]
88 asr r4, r4, #3 ; [6]
90 asr r5, r5, #3 ; [7]
108 asr r12, r7, #19 ; [8]
110 asr lr, r6, #19 ; [9]
[all …]
|
| D | intra4x4_predict_v6.asm | 67 mov r12, r4, asr #3 ; (expected_dc + 4) >> 3
159 add r0, r0, r4, asr #16 ;[a[4]+2 | a[2]+2]
163 and r9, r11, r9, asr #2
164 and r4, r11, r4, asr #2
201 pkhtb r8, r8, r8, asr #16 ; l[-|0|-|0]
202 pkhtb r9, r9, r9, asr #16 ; l[-|1|-|1]
203 pkhtb r10, r10, r10, asr #16 ; l[-|2|-|2]
204 pkhtb r11, r11, r11, asr #16 ; l[-|3|-|3]
243 pkhtb r7, r9, r8, asr #16
249 add r7, r7, r8, asr #15 ; [ a5+2*a6]
[all …]
|
| D | dequant_idct_v6.asm | 110 pkhtb r6, r6, r8, asr #16
115 pkhtb r8, r7, r9, asr #16
137 mov r8, r7, asr #3
138 pkhtb r9, r8, r10, asr #19
139 mov r8, r1, asr #3
140 pkhtb r8, r8, r6, asr #19
153 mov r7, r7, asr #3
154 pkhtb r7, r7, r10, asr #19
155 mov r1, r1, asr #3
156 pkhtb r1, r1, r6, asr #19
|
| /external/qemu/android/ |
| D | async-socket.c | 798 AsyncSocketIO* const asr = as->readers_head; in _on_async_socket_recv() local
799 if (asr == NULL) { in _on_async_socket_recv()
806 async_socket_io_reference(asr); in _on_async_socket_recv()
809 if (asr->state == ASIO_STATE_QUEUED) { in _on_async_socket_recv()
810 asr->state = ASIO_STATE_STARTED; in _on_async_socket_recv()
812 asr->state = ASIO_STATE_CONTINUES; in _on_async_socket_recv()
814 action = asr->on_io(asr->io_opaque, asr, asr->state); in _on_async_socket_recv()
826 async_socket_io_release(asr); in _on_async_socket_recv()
833 asr->buffer + asr->transferred, in _on_async_socket_recv()
834 asr->to_transfer - asr->transferred)); in _on_async_socket_recv()
[all …]
|
| /external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
| D | walsh_v6.asm | 77 mov r2, r2, asr #3 ; >> 3
83 mov r0, r0, asr #3 ; >> 3
90 mov r2, r2, asr #3 ; >> 3
97 mov r0, r0, asr #3 ; >> 3
114 mov r2, r2, asr #3 ; >> 3
120 mov r9, r9, asr #3 ; >> 3
126 mov r2, r2, asr #3 ; >> 3
133 mov r9, r9, asr #3 ; >> 3
149 mov r2, r2, asr #3 ; >> 3
155 mov r9, r9, asr #3 ; >> 3
[all …]
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/arm/armv6/ |
| D | walsh_v6.asm | 77 mov r2, r2, asr #3 ; >> 3
83 mov r0, r0, asr #3 ; >> 3
90 mov r2, r2, asr #3 ; >> 3
97 mov r0, r0, asr #3 ; >> 3
114 mov r2, r2, asr #3 ; >> 3
120 mov r9, r9, asr #3 ; >> 3
126 mov r2, r2, asr #3 ; >> 3
133 mov r9, r9, asr #3 ; >> 3
149 mov r2, r2, asr #3 ; >> 3
155 mov r9, r9, asr #3 ; >> 3
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-logical.txt | 66 # CHECK: and w1, w2, w3, asr #2
67 # CHECK: and x1, x2, x3, asr #2
88 # CHECK: ands w1, w2, w3, asr #2
89 # CHECK: ands x1, x2, x3, asr #2
110 # CHECK: bic w1, w2, w3, asr #3
111 # CHECK: bic x1, x2, x3, asr #3
132 # CHECK: bics w1, w2, w3, asr #3
133 # CHECK: bics x1, x2, x3, asr #3
154 # CHECK: eon w1, w2, w3, asr #4
155 # CHECK: eon x1, x2, x3, asr #4
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | fast-isel-ext.ll | 13 ; Note that lsl, asr and lsr in Thumb are all encoded as 16-bit instructions
79 ; v7: asr{{s?}} r0, r0, #31
82 ; prev6: asr{{s?}} r0, r0, #31
90 ; v7: asr{{s?}} r0, r0, #31
93 ; prev6: asr{{s?}} r0, r0, #31
101 ; v7: asr{{s?}} r0, r0, #31
104 ; prev6: asr{{s?}} r0, r0, #31
114 ; prev6: asr{{s?}} r0, r0, #24
124 ; prev6: asr{{s?}} r0, r0, #24
134 ; prev6: asr{{s?}} r0, r0, #16
|
| D | pack.ll | 41 ; CHECK: pkhtb r0, r0, r1, asr #16
51 ; CHECK: pkhtb r0, r0, r1, asr #16
61 ; CHECK: pkhtb r0, r0, r1, asr #12
72 ; CHECK: pkhtb r0, r0, r1, asr #18
85 ; CHECK-NOT: pkhtb r0, r0, r1, asr #22
94 ; CHECK: pkhtb r0, r0, r1, asr #16
104 ; CHECK: pkhtb r0, r0, r1, asr #17
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | addsub-shifted.ll | 140 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #18
145 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #31
150 ; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #5
156 ; CHECK-NOT: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #19
161 ; CHECK: neg {{w[0-9]+}}, {{w[0-9]+}}, asr #15
166 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #18
171 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #31
176 ; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #5
182 ; CHECK-NOT: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #19
187 ; CHECK: neg {{x[0-9]+}}, {{x[0-9]+}}, asr #45
[all …]
|