| /external/llvm/test/MC/SystemZ/ |
| D | regs-bad.s | 51 #CHECK: dlr %r1,%r0
53 #CHECK: dlr %r3,%r0
55 #CHECK: dlr %r5,%r0
57 #CHECK: dlr %r7,%r0
59 #CHECK: dlr %r9,%r0
61 #CHECK: dlr %r11,%r0
63 #CHECK: dlr %r13,%r0
65 #CHECK: dlr %r15,%r0
67 #CHECK: dlr %f0,%r1
69 #CHECK: dlr %a0,%r1
[all …]
|
| D | regs-good.s | 39 #CHECK: dlr %r0, %r0 # encoding: [0xb9,0x97,0x00,0x00]
40 #CHECK: dlr %r2, %r0 # encoding: [0xb9,0x97,0x00,0x20]
41 #CHECK: dlr %r4, %r0 # encoding: [0xb9,0x97,0x00,0x40]
42 #CHECK: dlr %r6, %r0 # encoding: [0xb9,0x97,0x00,0x60]
43 #CHECK: dlr %r8, %r0 # encoding: [0xb9,0x97,0x00,0x80]
44 #CHECK: dlr %r10, %r0 # encoding: [0xb9,0x97,0x00,0xa0]
45 #CHECK: dlr %r12, %r0 # encoding: [0xb9,0x97,0x00,0xc0]
46 #CHECK: dlr %r14, %r0 # encoding: [0xb9,0x97,0x00,0xe0]
48 dlr %r0,%r0
49 dlr %r2,%r0
[all …]
|
| D | insn-good.s | 4401 #CHECK: dlr %r0, %r0 # encoding: [0xb9,0x97,0x00,0x00]
4402 #CHECK: dlr %r0, %r15 # encoding: [0xb9,0x97,0x00,0x0f]
4403 #CHECK: dlr %r14, %r0 # encoding: [0xb9,0x97,0x00,0xe0]
4404 #CHECK: dlr %r6, %r9 # encoding: [0xb9,0x97,0x00,0x69]
4406 dlr %r0,%r0
4407 dlr %r0,%r15
4408 dlr %r14,%r0
4409 dlr %r6,%r9
|
| D | insn-bad.s | 1282 #CHECK: dlr %r1, %r0
1284 dlr %r1, %r0
|
| /external/valgrind/main/none/tests/s390x/ |
| D | div.stdout.exp | 37 dlr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000)
38 dlr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001)
39 dlr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF)
40 dlr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF)
41 dlr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000)
42 dlr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005)
43 dlr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000)
44 dlr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF)
45 dlr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFF00000001 (rem 0000000000000005)
46 dlr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 8000000000000000 (rem 0000000000000000)
[all …]
|
| D | div.c | 9 regsweep(dlr, m2); in do_regmem_insns()
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | int-div-02.ll | 13 ; CHECK: dlr %r2, %r4
27 ; CHECK: dlr %r2, %r4
41 ; CHECK: dlr %r2, %r4
42 ; CHECK-NOT: dlr
88 ; CHECK-NOT: {{dl|dlr}}
|
| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | invalid-regs.txt | 17 # This would be "dlr %r1, %r8", but %r1 is invalid.
|
| D | insns.txt | 2353 # CHECK: dlr %r0, %r0
2356 # CHECK: dlr %r0, %r15
2359 # CHECK: dlr %r14, %r0
2362 # CHECK: dlr %r6, %r9
|
| /external/clang/test/SemaCXX/ |
| D | warn-thread-safety-analysis.cpp | 1509 DataLocker dlr; in bar2() local
1510 dlr.lockData(d); in bar2()
1512 dlr.unlockData(d); in bar2()
1516 DataLocker dlr; in bar3() local
1517 dlr.lockData(d1); // expected-note {{mutex acquired here}} in bar3()
1518 dlr.unlockData(d2); // \ in bar3()
1523 DataLocker dlr; in bar4() local
1524 dlr.lockData(d1); in bar4()
1528 dlr.unlockData(d1); in bar4()
|
| /external/opencv/cv/src/ |
| D | cvstereogc.cpp | 706 const short* dlr[] = { dleft, dright }; in icvAlphaExpand() local
766 const short* disp = dlr[k]; in icvAlphaExpand()
|
| /external/valgrind/main/docs/internals/ |
| D | s390-opcodes.csv | 507 dlr,"divide logical 32",implemented,
|