Searched refs:guest_RAX (Results 1 – 12 of 12) sorted by relevance
422 canonical->sysno = gst->guest_RAX; in getSyscallArgsFromGuestState()604 canonical->sysno = gst->guest_RAX; in getSyscallArgsFromGuestState()672 gst->guest_RAX = canonical->sysno; in putSyscallArgsIntoGuestState()741 gst->guest_RAX = VG_DARWIN_SYSNO_FOR_KERNEL(canonical->sysno); in putSyscallArgsIntoGuestState()811 canonical->sres = VG_(mk_SysRes_amd64_linux)( gst->guest_RAX ); in getSyscallStatusFromGuestState()897 wLO = gst->guest_RAX; in getSyscallStatusFromGuestState()902 wLO = gst->guest_RAX; in getSyscallStatusFromGuestState()906 wLO = gst->guest_RAX; in getSyscallStatusFromGuestState()954 gst->guest_RAX = - (Long)sr_Err(canonical->sres); in putSyscallStatusIntoGuestState()956 gst->guest_RAX = sr_Res(canonical->sres); in putSyscallStatusIntoGuestState()[all …]
70 mach->__rax = vex->guest_RAX; in x86_thread_state64_from_vex()148 vex->guest_RAX = mach->__rax; in x86_thread_state64_to_vex()
245 ctst->arch.vex.guest_RAX = 0; in do_clone()
59 /* 16 */ ULong guest_RAX; member
2251 do { st->guest_RAX = (ULong)(_a); \ in amd64g_dirtyhelper_CPUID_baseline()2257 switch (0xFFFFFFFF & st->guest_RAX) { in amd64g_dirtyhelper_CPUID_baseline()2335 do { st->guest_RAX = (ULong)(_a); \ in amd64g_dirtyhelper_CPUID_sse3_and_cx16()2341 switch (0xFFFFFFFF & st->guest_RAX) { in amd64g_dirtyhelper_CPUID_sse3_and_cx16()2457 do { st->guest_RAX = (ULong)(_a); \ in amd64g_dirtyhelper_CPUID_sse42_and_cx16()2463 UInt old_eax = (UInt)st->guest_RAX; in amd64g_dirtyhelper_CPUID_sse42_and_cx16()2611 do { st->guest_RAX = (ULong)(_a); \ in amd64g_dirtyhelper_CPUID_avx_and_cx16()2617 UInt old_eax = (UInt)st->guest_RAX; in amd64g_dirtyhelper_CPUID_avx_and_cx16()2940 st->guest_RAX = (ULong)eax; in amd64g_dirtyhelper_RDTSCP()3756 vex_state->guest_RAX = 0; in LibVEX_GuestAMD64_initialise()
379 #define OFFB_RAX offsetof(VexGuestAMD64State,guest_RAX)
165 case 0: VG_(transfer) (&amd64->guest_RAX, buf, dir, size, mod); break; in transfer_register()
580 tst->arch.vex.guest_RAX = sc->rax; in restore_sigcontext()
766 vg_assert(16 == offsetof(VexGuestAMD64State,guest_RAX)); in do_pre_run_checks()767 vg_assert(VG_IS_8_ALIGNED(offsetof(VexGuestAMD64State,guest_RAX))); in do_pre_run_checks()1615 # define VG_CLREQ_ARGS guest_RAX
282 regs->rax = arch->vex.guest_RAX; in fill_prstatus()
76 regs.rax = vex->guest_RAX; in ptrace_setregs()
199 (*f)(tid, "RAX", vex->guest_RAX); in apply_to_GPs_of_tid()