| /external/llvm/test/Assembler/ |
| D | flags.ll | 3 @addr = external global i64
5 define i64 @add_unsigned(i64 %x, i64 %y) {
6 ; CHECK: %z = add nuw i64 %x, %y
7 %z = add nuw i64 %x, %y
8 ret i64 %z
11 define i64 @sub_unsigned(i64 %x, i64 %y) {
12 ; CHECK: %z = sub nuw i64 %x, %y
13 %z = sub nuw i64 %x, %y
14 ret i64 %z
17 define i64 @mul_unsigned(i64 %x, i64 %y) {
[all …]
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| D | ConstantExprFold.ll | 6 @A = global i64 0
8 global i64* inttoptr (i64 add (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X + 0 == X
9 global i64* inttoptr (i64 sub (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X - 0 == X
10 global i64* inttoptr (i64 mul (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X * 0 == 0
11 global i64* inttoptr (i64 sdiv (i64 ptrtoint (i64* @A to i64), i64 1) to i64*) ; X / 1 == X
12 global i64* inttoptr (i64 srem (i64 ptrtoint (i64* @A to i64), i64 1) to i64*) ; X % 1 == 0
13 global i64* inttoptr (i64 and (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X & 0 == 0
14 global i64* inttoptr (i64 and (i64 ptrtoint (i64* @A to i64), i64 -1) to i64*) ; X & -1 == X
15 global i64 or (i64 ptrtoint (i64* @A to i64), i64 -1) ; X | -1 == -1
16 global i64* inttoptr (i64 xor (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X ^ 0 == X
[all …]
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| /external/llvm/test/CodeGen/X86/ |
| D | 2009-04-16-SpillerUnfold.ll | 8 %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 }
9 %struct.anon = type { [16 x i64] }
10 @K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2]
12 …12_block_data_order(%struct.SHA512_CTX* nocapture %ctx, i8* nocapture %in, i64 %num) nounwind ssp {
17 %e.0489 = phi i64 [ 0, %entry ], [ %e.0, %bb349 ] ; <i64> [#uses=3]
18 %b.0472 = phi i64 [ 0, %entry ], [ %87, %bb349 ] ; <i64> [#uses=2]
19 …%asmtmp356 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %e.…
20 %0 = xor i64 0, %asmtmp356 ; <i64> [#uses=1]
21 %1 = add i64 0, %0 ; <i64> [#uses=1]
22 %2 = add i64 %1, 0 ; <i64> [#uses=1]
[all …]
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| D | 2009-03-23-MultiUseSched.ll | 10 @X = external global i64 ; <i64*> [#uses=25]
12 define fastcc i64 @foo() nounwind {
13 %tmp = load volatile i64* @X ; <i64> [#uses=7]
14 %tmp1 = load volatile i64* @X ; <i64> [#uses=5]
15 %tmp2 = load volatile i64* @X ; <i64> [#uses=3]
16 %tmp3 = load volatile i64* @X ; <i64> [#uses=1]
17 %tmp4 = load volatile i64* @X ; <i64> [#uses=5]
18 %tmp5 = load volatile i64* @X ; <i64> [#uses=3]
19 %tmp6 = load volatile i64* @X ; <i64> [#uses=2]
20 %tmp7 = load volatile i64* @X ; <i64> [#uses=1]
[all …]
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| D | 2009-06-02-RewriterBug.ll | 4 define void @sha256_block1(i32* nocapture %arr, i8* nocapture %in, i64 %num) nounwind {
12 %indvar2787 = phi i64 [ 0, %bb.nph ], [ %indvar.next2788, %for.end ] ; <i64> [#uses=2]
13 %tmp2791 = mul i64 %indvar2787, 44 ; <i64> [#uses=0]
14 %ctg22996 = getelementptr i8* %in, i64 0 ; <i8*> [#uses=1]
15 %conv = zext i32 undef to i64 ; <i64> [#uses=1]
16 %conv11 = zext i32 undef to i64 ; <i64> [#uses=1]
18 %conv19 = zext i32 %tmp18 to i64 ; <i64> [#uses=1]
20 %conv31 = zext i32 %tmp30 to i64 ; <i64> [#uses=4]
22 %conv442709 = zext i8 %ptrincdec3065 to i64 ; <i64> [#uses=1]
23 %shl45 = shl i64 %conv442709, 16 ; <i64> [#uses=1]
[all …]
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| D | 2011-08-29-BlockConstant.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
6 @x = global [500 x i64] zeroinitializer, align 64 ; <[500 x i64]*>
10 @y = global [63 x i64] [
11 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
12 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
13 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
14 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
15 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
16 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
17 i64 6799976246779207262, i64 6799976246779207262, i64 6799976246779207262,
[all …]
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| D | large-gep-chain.ll | 24 %tmp = getelementptr inbounds float* null, i64 1
25 %tmp3 = getelementptr inbounds float* %tmp, i64 1
26 %tmp4 = getelementptr inbounds float* %tmp3, i64 1
27 %tmp5 = getelementptr inbounds float* %tmp4, i64 1
28 %tmp6 = getelementptr inbounds float* %tmp5, i64 1
29 %tmp7 = getelementptr inbounds float* %tmp6, i64 1
30 %tmp8 = getelementptr inbounds float* %tmp7, i64 1
31 %tmp9 = getelementptr inbounds float* %tmp8, i64 1
32 %tmp10 = getelementptr inbounds float* %tmp9, i64 1
33 %tmp11 = getelementptr inbounds float* %tmp10, i64 1
[all …]
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| D | rot64.ll | 8 define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
10 %0 = shl i64 %x, %z
11 %1 = sub i64 64, %z
12 %2 = lshr i64 %x, %1
13 %3 = or i64 %2, %0
14 ret i64 %3
17 define i64 @bar(i64 %x, i64 %y, i64 %z) nounwind readnone {
19 %0 = shl i64 %y, %z
20 %1 = sub i64 64, %z
21 %2 = lshr i64 %x, %1
[all …]
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| D | 2007-10-31-extractelement-i64.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
6 define <1 x i64> @a(<2 x i64> %__A) {
8 %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2]
9 %retval = alloca <1 x i64>, align 8 ; <<1 x i64>*> [#uses=3]
11 store <2 x i64> %__A, <2 x i64>* %__A_addr
12 %tmp = load <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1]
13 %tmp1 = bitcast <2 x i64> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1]
14 %tmp2 = extractelement <2 x i64> %tmp1, i32 0 ; <i64> [#uses=1]
15 %tmp3 = bitcast i64 %tmp2 to <1 x i64> ; <<1 x i64>> [#uses=1]
16 store <1 x i64> %tmp3, <1 x i64>* %retval, align 8
[all …]
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| D | hipe-cc64.ll | 5 define void @zap(i64 %a, i64 %b) nounwind {
13 %0 = call cc 11 {i64, i64, i64} @addfour(i64 undef, i64 undef, i64 %a, i64 %b, i64 8, i64 9)
14 %res = extractvalue {i64, i64, i64} %0, 2
21 tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind
25 define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
30 %0 = add i64 %x, %y
31 %1 = add i64 %0, %z
32 %2 = add i64 %1, %w
35 %res = insertvalue {i64, i64, i64} undef, i64 %2, 2
36 ret {i64, i64, i64} %res
[all …]
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| D | large-constants.ll | 3 define i64 @constant_hoisting(i64 %o0, i64 %o1, i64 %o2, i64 %o3, i64 %o4, i64 %o5) {
5 %l0 = and i64 %o0, -281474976710654
6 %c0 = icmp ne i64 %l0, 0
10 %l1 = and i64 %o1, -281474976710654
11 %c1 = icmp ne i64 %l1, 0
15 %l2 = and i64 %o2, -281474976710654
16 %c2 = icmp ne i64 %l2, 0
20 %l3 = and i64 %o3, -281474976710654
21 %c3 = icmp ne i64 %l3, 0
25 %l4 = and i64 %o4, -281474976710653
[all …]
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| D | fast-isel-select-cmov2.ll | 6 define i64 @select_fcmp_false_cmov(double %a, double %b, i64 %c, i64 %d) {
11 %2 = select i1 %1, i64 %c, i64 %d
12 ret i64 %2
15 define i64 @select_fcmp_oeq_cmov(double %a, double %b, i64 %c, i64 %d) {
23 %2 = select i1 %1, i64 %c, i64 %d
24 ret i64 %2
27 define i64 @select_fcmp_ogt_cmov(double %a, double %b, i64 %c, i64 %d) {
32 %2 = select i1 %1, i64 %c, i64 %d
33 ret i64 %2
36 define i64 @select_fcmp_oge_cmov(double %a, double %b, i64 %c, i64 %d) {
[all …]
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| D | subreg-to-reg-4.ll | 14 define void @bar(i64 %x, i64 %y, i64* %z) nounwind readnone {
16 %t0 = add i64 %x, %y
17 %t1 = and i64 %t0, 4294967295
18 store i64 %t1, i64* %z
21 define void @easy(i32 %x, i32 %y, i64* %z) nounwind readnone {
24 %tn = zext i32 %t0 to i64
25 %t1 = and i64 %tn, 4294967295
26 store i64 %t1, i64* %z
29 define void @cola(i64 *%x, i64 %y, i64* %z, i64 %u) nounwind readnone {
31 %p = load i64* %x
[all …]
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| D | vec_shuffle-15.ll | 3 define <2 x i64> @t00(<2 x i64> %a, <2 x i64> %b) nounwind {
4 %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 0 >
5 ret <2 x i64> %tmp
8 define <2 x i64> @t01(<2 x i64> %a, <2 x i64> %b) nounwind {
9 %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 1 >
10 ret <2 x i64> %tmp
13 define <2 x i64> @t02(<2 x i64> %a, <2 x i64> %b) nounwind {
14 %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 2 >
15 ret <2 x i64> %tmp
18 define <2 x i64> @t03(<2 x i64> %a, <2 x i64> %b) nounwind {
[all …]
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| D | tailcall-returndup-void.ll | 5 @sES_closure = external global [0 x i64]
6 declare cc10 void @sEH_info(i64* noalias nocapture, i64* noalias nocapture, i64* noalias nocapture,…
8 …id @rBM_info(i64* noalias nocapture %Base_Arg, i64* noalias nocapture %Sp_Arg, i64* noalias nocapt…
10 %ln265 = getelementptr inbounds i64* %Sp_Arg, i64 -2
11 %ln266 = ptrtoint i64* %ln265 to i64
12 %ln268 = icmp ult i64 %ln266, %R3_Arg
16 …br i1 icmp ne (i64 and (i64 ptrtoint ([0 x i64]* @sES_closure to i64), i64 7), i64 0), label %c1ZP…
19 %ln1ZT.i = load i64* getelementptr inbounds ([0 x i64]* @sES_closure, i64 0, i64 0), align 8
20 %ln1ZU.i = inttoptr i64 %ln1ZT.i to void (i64*, i64*, i64*, i64, i64, i64)*
21 …1ZU.i(i64* %Base_Arg, i64* %Sp_Arg, i64* %Hp_Arg, i64 ptrtoint ([0 x i64]* @sES_closure to i64), i…
[all …]
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| D | 2008-08-06-RewriterBug.ll | 4 @data = external global [400 x i64] ; <[400 x i64]*> [#uses=5]
7 load i64* getelementptr ([400 x i64]* @data, i32 0, i64 200), align 4 ; <i64>:3 [#uses=1]
8 load i64* getelementptr ([400 x i64]* @data, i32 0, i64 199), align 4 ; <i64>:4 [#uses=1]
9 load i64* getelementptr ([400 x i64]* @data, i32 0, i64 198), align 4 ; <i64>:5 [#uses=2]
10 load i64* getelementptr ([400 x i64]* @data, i32 0, i64 197), align 4 ; <i64>:6 [#uses=1]
14 …load double** getelementptr (double** bitcast ([400 x i64]* @data to double**), i64 180), align 8 …
16 ptrtoint double* %9 to i64 ; <i64>:10 [#uses=1]
17 mul i64 %4, %3 ; <i64>:11 [#uses=1]
18 add i64 0, %11 ; <i64>:12 [#uses=1]
19 shl i64 %12, 3 ; <i64>:13 [#uses=1]
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | vldm-sched-a9.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
11 define void @test(i64* %src) #0 {
13 %arrayidx39 = getelementptr inbounds i64* %src, i32 13
14 …i64> undef, <16 x i64> <i64 15, i64 16, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64…
15 store <16 x i64> %vecinit285, <16 x i64>* undef, align 128
16 %0 = load i64* undef, align 8
17 %vecinit379 = insertelement <16 x i64> undef, i64 %0, i32 9
18 %1 = load i64* undef, align 8
19 %vecinit419 = insertelement <16 x i64> undef, i64 %1, i32 15
20 store <16 x i64> %vecinit419, <16 x i64>* undef, align 128
[all …]
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | bswap-03.ll | 5 declare i64 @llvm.bswap.i64(i64 %a)
8 define i64 @f1(i64 *%src) {
12 %a = load i64 *%src
13 %swapped = call i64 @llvm.bswap.i64(i64 %a)
14 ret i64 %swapped
18 define i64 @f2(i64 *%src) {
22 %ptr = getelementptr i64 *%src, i64 65535
23 %a = load i64 *%ptr
24 %swapped = call i64 @llvm.bswap.i64(i64 %a)
25 ret i64 %swapped
[all …]
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| D | int-add-12.ll | 6 define void @f1(i64 *%ptr) {
10 %val = load i64 *%ptr
11 %add = add i64 %val, 127
12 store i64 %add, i64 *%ptr
17 define void @f2(i64 *%ptr) {
21 %val = load i64 *%ptr
22 %add = add i64 %val, 127
23 store i64 %add, i64 *%ptr
29 define void @f3(i64 *%ptr) {
34 %val = load i64 *%ptr
[all …]
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| D | int-div-04.ll | 5 declare i64 @foo()
8 define void @f1(i64 %dummy, i64 %a, i64 %b, i64 *%dest) {
14 %div = sdiv i64 %a, %b
15 store i64 %div, i64 *%dest
20 define void @f2(i64 %dummy, i64 %a, i64 %b, i64 *%dest) {
26 %rem = srem i64 %a, %b
27 store i64 %rem, i64 *%dest
32 define i64 @f3(i64 %dummy1, i64 %a, i64 %b) {
39 %div = sdiv i64 %a, %b
40 %rem = srem i64 %a, %b
[all …]
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| D | int-conv-03.ll | 1 ; Test sign extensions from a byte to an i64.
6 define i64 @f1(i32 %a) {
11 %ext = sext i8 %byte to i64
12 ret i64 %ext
15 ; ...and again with an i64.
16 define i64 @f2(i64 %a) {
20 %byte = trunc i64 %a to i8
21 %ext = sext i8 %byte to i64
22 ret i64 %ext
26 define i64 @f3(i8 *%src) {
[all …]
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| D | int-conv-07.ll | 1 ; Test sign extensions from a halfword to an i64.
6 define i64 @f1(i64 %a) {
10 %half = trunc i64 %a to i16
11 %ext = sext i16 %half to i64
12 ret i64 %ext
15 ; ...and again with an i64.
16 define i64 @f2(i32 %a) {
21 %ext = sext i16 %half to i64
22 ret i64 %ext
26 define i64 @f3(i16 *%src) {
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-anyregcc-crash.ll | 6 define i64 @anyreglimit(i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
7 … i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
8 … i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
9 … i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
11 …esult = tail call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 12…
12 i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
13 i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
14 i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
15 i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32)
16 ret i64 %result
[all …]
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| /external/llvm/test/Transforms/InstSimplify/ |
| D | undef.ll | 4 ; CHECK: ret i64 undef
5 define i64 @test0() {
6 %r = mul i64 undef, undef
7 ret i64 %r
11 ; CHECK: ret i64 undef
12 define i64 @test1() {
13 %r = mul i64 3, undef
14 ret i64 %r
18 ; CHECK: ret i64 undef
19 define i64 @test2() {
[all …]
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| /external/llvm/test/Transforms/InstCombine/ |
| D | constant-fold-gep.ll | 2 target datalayout = "E-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32…
12 ; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0)…
13 store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0), align 4
14 ; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 1)…
15 store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 1), align 4
16 ; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 2)…
17 store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 2), align 4
18 ; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 0)…
19 store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 3), align 4
20 ; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 1)…
[all …]
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