| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 16 # ADD/SUB (shifted register) are reserved if shift == '11' or sf == '0' and imm6<5> == '1'.
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| /external/valgrind/main/VEX/priv/ |
| D | host_arm64_defs.h | 225 UInt imm6; /* 1 .. 63 */ member
234 extern ARM64RI6* ARM64RI6_I6 ( UInt imm6 );
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| D | guest_arm64_toIR.c | 2191 UInt imm6 = INSN(15,10); in dis_ARM64_data_processing_immediate() local
2197 if (!is64 && imm6 >= 32) in dis_ARM64_data_processing_immediate()
2206 if (imm6 == 0) { in dis_ARM64_data_processing_immediate()
2210 vassert(imm6 > 0 && imm6 < szBits); in dis_ARM64_data_processing_immediate()
2212 binop(mkSHL(ty), mkexpr(srcHi), mkU8(szBits-imm6)), in dis_ARM64_data_processing_immediate()
2213 binop(mkSHR(ty), mkexpr(srcLo), mkU8(imm6)))); in dis_ARM64_data_processing_immediate()
2218 nameIRegOrZR(is64,nn), nameIRegOrZR(is64,mm), imm6); in dis_ARM64_data_processing_immediate()
2311 UInt imm6 = INSN(15,10); in dis_ARM64_data_processing_register() local
2317 if ((!is64 && imm6 > 31) || sh == BITS2(1,1)) { in dis_ARM64_data_processing_register()
2322 IRTemp argR = getShiftedIRegOrZR(is64, sh, imm6, rM, False); in dis_ARM64_data_processing_register()
[all …]
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| D | host_arm_isel.c | 3110 UInt imm6; in iselNeon64Expr_wrk() local
3116 imm6 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3117 vassert(imm6 <= 32 && imm6 > 0); in iselNeon64Expr_wrk()
3118 imm6 = 64 - imm6; in iselNeon64Expr_wrk()
3126 addInstr(env, ARMInstr_NUnary(op, res, arg, imm6, False)); in iselNeon64Expr_wrk()
5218 UInt imm6; in iselNeonExpr_wrk() local
5224 imm6 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5225 vassert(imm6 <= 32 && imm6 > 0); in iselNeonExpr_wrk()
5226 imm6 = 64 - imm6; in iselNeonExpr_wrk()
5234 addInstr(env, ARMInstr_NUnary(op, res, arg, imm6, True)); in iselNeonExpr_wrk()
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| D | host_arm64_defs.c | 583 ARM64RI6* ARM64RI6_I6 ( UInt imm6 ) { in ARM64RI6_I6() argument
586 ri6->ARM64ri6.I6.imm6 = imm6; in ARM64RI6_I6()
587 vassert(imm6 > 0 && imm6 < 64); in ARM64RI6_I6()
600 vex_printf("#%u", ri6->ARM64ri6.I6.imm6); in ppARM64RI6()
4154 UInt sh = argR->ARM64ri6.I6.imm6; in emit_ARM64Instr()
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| D | host_arm64_isel.c | 1409 vassert(ri->ARM64ri6.I6.imm6 < 64); in iselIntExpr_RI6()
1410 vassert(ri->ARM64ri6.I6.imm6 > 0); in iselIntExpr_RI6()
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| D | guest_arm_toIR.c | 5906 UInt imm6 = (theInstr >> 16) & 0x3f; in dis_neon_data_2reg_and_shift() local
5920 tmp = (L << 6) | imm6; in dis_neon_data_2reg_and_shift()
5923 shift_imm = 64 - imm6; in dis_neon_data_2reg_and_shift()
5926 shift_imm = 64 - imm6; in dis_neon_data_2reg_and_shift()
5929 shift_imm = 32 - imm6; in dis_neon_data_2reg_and_shift()
5932 shift_imm = 16 - imm6; in dis_neon_data_2reg_and_shift()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3851 let Inst{21-19} = 0b001; // imm6 = 001xxx
3855 let Inst{21-20} = 0b01; // imm6 = 01xxxx
3859 let Inst{21} = 0b1; // imm6 = 1xxxxx
3863 // imm6 = xxxxxx
3868 let Inst{21-19} = 0b001; // imm6 = 001xxx
3872 let Inst{21-20} = 0b01; // imm6 = 01xxxx
3876 let Inst{21} = 0b1; // imm6 = 1xxxxx
3880 // imm6 = xxxxxx
3888 let Inst{21-19} = 0b001; // imm6 = 001xxx
3892 let Inst{21-20} = 0b01; // imm6 = 01xxxx
[all …]
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| D | ARMInstrFormats.td | 207 // other shift immediates. The imm6 field is encoded like so:
210 // 8 imm6<5:3> = '001', 8 - <imm> is encoded in imm6<2:0>
211 // 16 imm6<5:4> = '01', 16 - <imm> is encoded in imm6<3:0>
212 // 32 imm6<5> = '1', 32 - <imm> is encoded in imm6<4:0>
213 // 64 64 - <imm> is encoded in imm6<5:0>
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-armv7.txt | 357 # imm6=0b0xxxxx -> UNDEFINED
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrFormats.td | 544 // {5-0} - imm6
566 // {5-0} - imm6
588 // {5-0} - imm6: #0, #8, #16, or #24
597 // {5-0} - imm6: #0 or #8
620 // {5-0} - imm6: #0 or #12
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| /external/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 2283 uint32_t imm6 = Bits32(opcode, 21, 16); in EmulateB() local
2287 uint32_t imm21 = (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1); in EmulateB()
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