| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 222 assert(MO.isImm() && "did not expect relocated expression"); in getMachineOpValue()
233 if (MO.isImm()) in getLdStUImm12OpValue()
254 if (MO.isImm()) in getAdrLabelOpValue()
285 if (MO.isImm()) in getAddSubImmOpValue()
307 if (MO.isImm()) in getCondBranchTargetOpValue()
329 if (MO.isImm()) in getLoadLiteralOpValue()
357 if (MO.isImm()) in getMoveWideImmOpValue()
377 if (MO.isImm()) in getTestBranchTargetOpValue()
399 if (MO.isImm()) in getBranchTargetOpValue()
425 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getVecShifterOpValue()
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 56 assert(Inst.getOperand(2).isImm()); in LowerLargeShift()
96 assert(InstIn.getOperand(2).isImm()); in LowerDextDins()
98 assert(InstIn.getOperand(3).isImm()); in LowerDextDins()
211 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTargetOpValue()
233 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMM()
256 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget21OpValue()
278 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget26OpValue()
299 if (MO.isImm()) return MO.getImm(); in getJumpOffset16OpValue()
318 if (MO.isImm()) return MO.getImm()>>2; in getJumpTargetOpValue()
336 if (MO.isImm()) return MO.getImm() >> 1; in getJumpTargetOpValueMM()
[all …]
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 43 if(MI->getOperand(3).isImm()) in EmitAnyX86InstComments()
71 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
82 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
95 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
105 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
119 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
129 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
141 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
151 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
309 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
[all …]
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| D | X86IntelInstPrinter.cpp | 133 if (Op.isImm()) in printPCRelImm()
156 } else if (Op.isImm()) { in printOperand()
194 if (!DispSpec.isImm()) { in printMemReference()
251 if (DispSpec.isImm()) { in printMemOffset()
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| D | X86ATTInstPrinter.cpp | 144 if (Op.isImm()) in printPCRelImm()
167 } else if (Op.isImm()) { in printOperand()
199 if (DispSpec.isImm()) { in printMemReference()
273 if (DispSpec.isImm()) { in printMemOffset()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
69 MI.getOperand(1).isImm() && MI.getOperand(1).getImm() != 8) { in getITDeprecationInfo()
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 275 bool isImm = fieldFromInstruction(insn, 13, 1); in DecodeMem() local
278 if (isImm) in DecodeMem()
296 if (isImm) in DecodeMem()
391 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeJMPL() local
394 if (isImm) in DecodeJMPL()
410 if (isImm) in DecodeJMPL()
424 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeReturn() local
427 if (isImm) in DecodeReturn()
438 if (isImm) in DecodeReturn()
453 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeSWAP() local
[all …]
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 167 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
179 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
192 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
205 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
217 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
234 if (MO.isImm()) in getMemRIEncoding()
253 if (MO.isImm()) in getMemRIXEncoding()
316 assert(MO.isImm() && in getMachineOpValue()
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| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| D | MSP430InstPrinter.cpp | 38 if (Op.isImm()) in printPCRelImmOperand()
52 } else if (Op.isImm()) { in printOperand()
80 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCCodeEmitter.cpp | 121 if (MO.isImm()) in getMachineOpValue()
145 if (MO.isReg() || MO.isImm()) in getCallTargetOpValue()
180 if (MO.isReg() || MO.isImm()) in getBranchTargetOpValue()
193 if (MO.isReg() || MO.isImm()) in getBranchPredTargetOpValue()
205 if (MO.isReg() || MO.isImm()) in getBranchOnRegTargetOpValue()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 253 bool isImm() const { return Kind == CV_Immediate; } in isImm() function in __anonf3083afd0111::CountValue
264 assert(isImm() && "Wrong CountValue accessor"); in getImm()
271 if (isImm()) { OS << Contents.ImmVal; } in print()
528 if (Op2.isImm() || Op1.getReg() == IVReg) in getLoopTripCount()
561 assert(EndValue->isImm() && "Unrecognized latch comparison"); in getLoopTripCount()
569 assert(InitialValue->isImm()); in getLoopTripCount()
635 assert (Start->isReg() || Start->isImm()); in computeCount()
636 assert (End->isReg() || End->isImm()); in computeCount()
652 if (Start->isImm() && End->isImm()) { in computeCount()
721 bool RegToImm = Start->isReg() && End->isImm(); // for (reg..imm) in computeCount()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCodeEmitter.cpp | 190 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getDirectBrEncoding()
206 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getAbsDirectBrEncoding()
219 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getImm16Encoding()
240 if (MO.isImm()) in getMemRIEncoding()
256 if (MO.isImm()) in getMemRIXEncoding()
288 assert(MO.isImm() && in getMachineOpValue()
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| D | PPCBranchSelector.cpp | 117 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction()
120 !I->getOperand(1).isImm()) in runOnMachineFunction()
124 !I->getOperand(0).isImm()) in runOnMachineFunction()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 233 if (MI->getOperand(OpNo).isImm()) in printS16ImmOperand()
241 if (MI->getOperand(OpNo).isImm()) in printU16ImmOperand()
249 if (!MI->getOperand(OpNo).isImm()) in printBranchOperand()
260 if (!MI->getOperand(OpNo).isImm()) in printAbsBranchOperand()
350 if (Op.isImm()) { in printOperand()
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| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| D | SparcInstPrinter.cpp | 67 if (MI->getOperand(2).isImm() && in printSparcAliasInstr()
117 if (MO.isImm()) { in printOperand()
141 if (MO.isImm() && MO.getImm() == 0) in printMemOperand()
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| /external/llvm/include/llvm/MC/ |
| D | MCInst.h | 57 bool isImm() const { return Kind == kImmediate; } in isImm() function
75 assert(isImm() && "This is not an immediate"); in getImm()
79 assert(isImm() && "This is not an immediate"); in setImm()
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| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 89 if (MO.isImm()) in getLitEncoding()
158 if (Op.isImm()) in EncodeInstruction()
199 } else if (MO.isImm()) in getMachineOpValue()
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| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 192 bool isImm() const override { in isImm() function in __anon93072fb70111::SystemZOperand
195 bool isImm(int64_t MinValue, int64_t MaxValue) const { in isImm() function in __anon93072fb70111::SystemZOperand
283 bool isU4Imm() const { return isImm(0, 15); } in isU4Imm()
284 bool isU6Imm() const { return isImm(0, 63); } in isU6Imm()
285 bool isU8Imm() const { return isImm(0, 255); } in isU8Imm()
286 bool isS8Imm() const { return isImm(-128, 127); } in isS8Imm()
287 bool isU16Imm() const { return isImm(0, 65535); } in isU16Imm()
288 bool isS16Imm() const { return isImm(-32768, 32767); } in isS16Imm()
289 bool isU32Imm() const { return isImm(0, (1LL << 32) - 1); } in isU32Imm()
290 bool isS32Imm() const { return isImm(-(1LL << 31), (1LL << 31) - 1); } in isS32Imm()
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| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| D | HexagonInstPrinter.cpp | 97 } else if(MO.isImm()) { in printOperand()
110 } else if(MO.isImm()) { in printImmOperand()
199 assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand"); in printSymbol()
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 406 bool isImm() const override { return Kind == k_Immediate; } in isImm() function in __anon27fec24b0211::AArch64Operand
409 if (!isImm()) in isSImm9()
418 if (!isImm()) in isSImm7s4()
427 if (!isImm()) in isSImm7s8()
436 if (!isImm()) in isSImm7s16()
479 if (!isImm()) in isUImm12Offset()
491 if (!isImm()) in isImm0_7()
500 if (!isImm()) in isImm1_8()
509 if (!isImm()) in isImm0_15()
518 if (!isImm()) in isImm1_16()
[all …]
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 126 bool isImm() const override { return Kind == Immediate; } in isImm() function
129 if (!isImm()) in isImmSExti16i8()
143 if (!isImm()) in isImmSExti32i8()
157 if (!isImm()) in isImmZExtu32u8()
171 if (!isImm()) in isImmSExti64i8()
185 if (!isImm()) in isImmSExti64i32()
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| /external/llvm/utils/TableGen/ |
| D | FastISelEmitter.cpp | 96 bool isImm() const { return Repr >= OK_Imm; } in isImm() function in __anone8ec1ae90311::OperandsSignature::OpKind
98 unsigned getImmCode() const { assert(isImm()); return Repr-OK_Imm; } in getImmCode()
129 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
139 if (!Operands[i].isImm()) in getWithoutImmCodes()
149 if (!Operands[i].isImm()) continue; in emitImmediatePredicate()
287 } else if (Operands[i].isImm()) { in PrintParameters()
313 } else if (Operands[i].isImm()) { in PrintArguments()
329 } else if (Operands[i].isImm()) { in PrintArguments()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 653 assert(isImm() && "Invalid access!"); in getImm()
689 bool isImm() const override { return Kind == k_Immediate; } in isImm() function in __anon92bc5ab90311::ARMOperand
694 if (!isImm()) return false; in isUnsignedOffset()
708 if (!isImm()) return false; in isSignedOffset()
726 if (isImm()) { in isThumbMemPC()
741 if (!isImm()) return false; in isFPImm()
748 if (!isImm()) return false; in isFBits16()
755 if (!isImm()) return false; in isFBits32()
762 if (!isImm()) return false; in isImm8s4()
769 if (!isImm()) return false; in isImm0_1020s4()
[all …]
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 77 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { in printInst()
113 if (Op2.isImm() && Op3.isImm()) { in printInst()
897 } else if (Op.isImm()) { in printOperand()
935 assert(Op.isImm() && "System instruction C[nm] operands must be immediates!"); in printSysCROperand()
942 if (MO.isImm()) { in printAddSubImm()
1066 if (MO.isImm()) { in printUImm12Offset()
1078 if (MO1.isImm()) { in printAMIndexedWB()
1225 if (Op.isImm()) { in printAlignedLabel()
1249 if (Op.isImm()) { in printAdrpLabel()
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| /external/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 294 if (RegOrImm.isImm()) in insertCallDefsUses()
354 if (!MO.isImm()) in needsUnimp()
409 && (!OrMI->getOperand(2).isImm() || OrMI->getOperand(2).getImm() != 0)) in combineRestoreOR()
439 if (!SetHiMI->getOperand(1).isImm()) in combineRestoreSETHIi()
|