Searched refs:isX86_64ExtendedReg (Results 1 – 6 of 6) sorted by relevance
191 if (X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(0))) in determineREX()196 if (X86InstrInfo::isX86_64ExtendedReg(MO)) in determineREX()202 if (X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(0))) in determineREX()209 if (X86InstrInfo::isX86_64ExtendedReg(MO)) in determineREX()224 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e))) in determineREX()230 if (X86InstrInfo::isX86_64ExtendedReg(MO)) in determineREX()238 if (X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(0))) in determineREX()243 if (X86InstrInfo::isX86_64ExtendedReg(MO)) in determineREX()715 if (X86II::isX86_64ExtendedReg(SrcReg)) in getVEXRegisterEncoding()859 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()[all …]
379 static bool isX86_64ExtendedReg(const MachineOperand &MO) { in isX86_64ExtendedReg() function381 return X86II::isX86_64ExtendedReg(MO.getReg()); in isX86_64ExtendedReg()
419 if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(0).getReg()) && in Lower()420 X86II::isX86_64ExtendedReg(OutMI.getOperand(1).getReg())) { in Lower()443 if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(0).getReg()) && in Lower()444 X86II::isX86_64ExtendedReg(OutMI.getOperand(2).getReg())) { in Lower()765 if (X86II::isX86_64ExtendedReg(ScratchReg)) in LowerPATCHPOINT()
92 if (X86II::isX86_64ExtendedReg(SrcReg)) in getVEXRegisterEncoding()748 if (X86II::isX86_64ExtendedReg(MI.getOperand(MemOperand + in EmitVEXOpcodePrefix()751 if (X86II::isX86_64ExtendedReg(MI.getOperand(MemOperand + in EmitVEXOpcodePrefix()772 if (X86II::isX86_64ExtendedReg(MO.getReg())) in EmitVEXOpcodePrefix()789 if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg())) in EmitVEXOpcodePrefix()805 if (X86II::isX86_64ExtendedReg( in EmitVEXOpcodePrefix()808 if (X86II::isX86_64ExtendedReg( in EmitVEXOpcodePrefix()840 if (X86II::isX86_64ExtendedReg( in EmitVEXOpcodePrefix()843 if (X86II::isX86_64ExtendedReg( in EmitVEXOpcodePrefix()857 if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg())) in EmitVEXOpcodePrefix()[all …]
721 inline bool isX86_64ExtendedReg(unsigned RegNo) { in isX86_64ExtendedReg() function
866 X86II::isX86_64ExtendedReg(RegNo)) in ParseRegister()2238 if (X86II::isX86_64ExtendedReg(Inst.getOperand(0).getReg()) || in processInstruction()2239 !X86II::isX86_64ExtendedReg(Inst.getOperand(1).getReg())) in processInstruction()2263 if (X86II::isX86_64ExtendedReg(Inst.getOperand(0).getReg()) || in processInstruction()2264 !X86II::isX86_64ExtendedReg(Inst.getOperand(2).getReg())) in processInstruction()