| /external/llvm/test/CodeGen/Mips/ |
| D | madd-msub.ll | 31 ; 32R6-DAG: muh $[[T5:[0-9]+]], ${{[45]}}, ${{[45]}}
126 ; 32R6-DAG: muh $[[T5:[0-9]+]], ${{[45]}}, ${{[45]}}
163 ; 32R6-DAG: muh $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
261 ; 32R6-DAG: muh $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
|
| /external/chromium_org/v8/test/cctest/ |
| D | test-disasm-mips.cc | 153 COMPARE(muh(a0, a1, a2), in TEST()
157 COMPARE(muh(t1, t2, t3), in TEST()
161 COMPARE(muh(v0, v1, a0), in TEST()
|
| D | test-disasm-mips64.cc | 186 COMPARE(muh(a0, a1, a2), in TEST()
194 COMPARE(muh(a5, a6, a7), in TEST()
202 COMPARE(muh(v0, v1, a0), in TEST()
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips32r6.txt | 94 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
|
| D | mips64r6.txt | 103 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
|
| /external/chromium_org/v8/src/mips/ |
| D | macro-assembler-mips.cc | 676 muh(rd_hi, rs, rt.rm()); in Mul()
681 muh(rd_hi, rs, rt.rm()); in Mul()
696 muh(rd_hi, rs, at); in Mul()
701 muh(rd_hi, rs, at); in Mul()
714 muh(rd, rs, rt.rm()); in Mulh()
724 muh(rd, rs, at); in Mulh()
|
| D | assembler-mips.h | 761 void muh(Register rd, Register rs, Register rt);
|
| D | assembler-mips.cc | 1500 void Assembler::muh(Register rd, Register rs, Register rt) { in muh() function in v8::internal::Assembler
|
| /external/chromium_org/v8/src/mips64/ |
| D | assembler-mips64.h | 759 void muh(Register rd, Register rs, Register rt);
|
| D | macro-assembler-mips64.cc | 698 muh(rd, rs, rt.rm()); in Mulh()
708 muh(rd, rs, at); in Mulh()
|
| D | assembler-mips64.cc | 1473 void Assembler::muh(Register rd, Register rs, Register rt) { in muh() function in v8::internal::Assembler
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 462 class MUH_DESC : MUL_R6_DESC_BASE<"muh", GPR32Opnd, mulhs>;
|