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Searched refs:r17 (Results 1 – 25 of 52) sorted by relevance

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/external/oprofile/module/ia64/
DIA64minstate.h167 adds r17=8, r1; \
170 st8 [r17]=rCRIIP, 16; /* save cr.iip */ \
174 st8 [r17]=rARUNAT, 16; /* save ar.unat */ \
178 st8 [r17]=rARRSC, 16; /* save ar.rsc */ \
182 (pKern) adds r17=16, r17; /* skip over ar_bspstore field */ \
184 (pUser) st8 [r17]=rARBSPSTORE, 16; /* save ar.bspstore */ \
187 st8 [r17]=rB6, 16; /* save b6 */ \
192 st8.spill [r17]=rR1, 16; /* save original r1 */ \
195 .mem.offset 8, 0; st8.spill [r17]=r3, 16; \
199 .mem.offset 8, 0; st8.spill [r17]=r13, 16; \
[all …]
DIA64syscallstub.h37 mov r17=rp; \
51 st8 [r16]=r17; /* save krp */ \
125 addl r17=.L5_##name - .L4_##name, r3; \
127 mov b6=r17; \
/external/openssl/crypto/bn/asm/
Dia64.S559 { .mii; add r17=8,r34
628 add r17=8,r34 }
639 ldf8 f121=[r17],32 }
643 ldf8 f125=[r17] }
712 { .mfi; getf.sig r17=f51
733 add r17=r17,r16 }
741 cmp.ltu p7,p0=r17,r16 }
742 { .mfi; add r18=r18,r17
747 { .mfi; cmp.ltu p7,p0=r18,r17
775 { .mfi; getf.sig r17=f71
[all …]
/external/libunwind/src/ia64/
DGinstall_cursor.S68 ld8 r17 = [r2], 2*LOC_SIZE // r17 = loc[IA64_REG_FR17]
75 and r17 = -4, r17
79 ldf.fill f17 = [r17] // f17 restored (don't touch no more)
165 ld8 r17= [r3], (B4_LOC_OFF - B2_LOC_OFF) // r17 = b2_loc
176 and r17 = -4, r17
180 ld8 r17 = [r17] // r17 = *b2_loc
208 mov b2 = r17 // b2 restored (don't touch no more)
284 ld8 r17 = [r9] // r17 restored (don't touch no more)
Dsetjmp.S40 adds r17 = JB_BSP*8, r32
44 st8 [r17] = r2 // jmp_buf[JB_BSP] = bsp
DGresume.c49 unw_word_t r17; in local_resume() member
148 extra.r17 = c->eh_args[2]; in local_resume()
152 (long) extra.r17, (long) extra.r18); in local_resume()
Dsiglongjmp.S49 st8 [sp] = r17 // store signal mask
/external/libunwind/tests/
Dia64-test-rbs-asm.S76 mov r17 = ar.bspstore; \
83 st8 [r3] = r17, (SAVED_RNAT_OFF - SAVED_BSPSTORE_OFF); \
99 ld8 r17 = [r3], (SAVED_PFS_OFF-SAVED_RP_OFF);; /* saved rp */ \
104 mov rp = r17; \
181 (p6) ld8 r17 = [in2] // get address of function descriptor
186 (p6) ld8 r16 = [r17], 8 // load entry point
190 (p6) ld8 r1 = [r17] // load gp
Dia64-test-stack-asm.S70 mov r17 = ar.bspstore
77 st8 [r3] = r17, (SAVED_RNAT_OFF - SAVED_BSPSTORE_OFF)
105 ld8 r17 = [r3], (SAVED_PFS_OFF-SAVED_RP_OFF);; // saved rp
111 mov rp = r17
/external/linux-tools-perf/perf-3.12.0/arch/tile/lib/
Dmemcpy_32.S257 { slt_u r13, r3, r15; addi r17, r1, 16 }
262 EX: { lw r17, r17; addi r1, r1, 48; mvz r3, r13, r1 } /* r17 = WORD_4 */
285 EX: { lw r19, r1; addi r1, r1, 4; move zero, r17 } /* r19 = WORD_5 */
305 EX: { sw r0, r17; addi r0, r0, 4; mvz r9, r16, r13 }/* store(WORD_4) */
411 { mvz r3, r8, r1; movei r17, 0 }
446 EX: { lwadd_na r12, r1, 4; addi r17, r17, 1 }
456 { move r6, r14; bbst r17, .Lcopy_half_an_unaligned_line }
/external/clang/test/CXX/except/except.spec/
Dp3.cpp73 extern void (*r17)(); // expected-note {{previous declaration}}
74 extern void (*r17)() noexcept(false); // expected-error {{does not match}}
/external/valgrind/main/none/tests/ppc64/
Dtest_isa_2_06_part2.c45 register HWord_t r17 __asm__ ("r17");
937 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_bpermd()
939 (unsigned long long)r15, (unsigned long long)r17); in test_bpermd()
968 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
973 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
978 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
983 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1004 __asm__ __volatile__ ("divweu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1009 __asm__ __volatile__ ("divweuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1014 __asm__ __volatile__ ("divweu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
[all …]
Dtest_isa_2_06_part3.c45 register HWord_t r17 __asm__ ("r17");
934 __asm__ __volatile__ ("divdeu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
939 __asm__ __volatile__ ("divdeuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
944 __asm__ __volatile__ ("divdeu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
949 __asm__ __volatile__ ("divdeuo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
970 __asm__ __volatile__ ("divwe %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
975 __asm__ __volatile__ ("divweo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
980 __asm__ __volatile__ ("divwe. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
985 __asm__ __volatile__ ("divweo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
1404 div_dw_tdata[i][0], div_dw_tdata[i][1], (signed long long) r17); in test_div_extensions()
[all …]
Dtest_isa_2_07_part1.c189 register HWord_t r17 __asm__ ("r17");
305 __asm__ __volatile__ ("lqarx %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); in test_stqcx()
308 __asm__ __volatile__ ("stqcx. %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); in test_stqcx()
318 __asm__ __volatile__ ("lqarx %0, %1, %2, 0" : :"r" (r14), "r" (r16),"r" (r17)); in test_lqarx()
1458 r17 = ZERO; in test_int_stq_three_regs()
1531 r17 = 0; in test_int_ldq_three_regs()
/external/valgrind/main/none/tests/ppc32/
Dtest_isa_2_06_part2.c45 register HWord_t r17 __asm__ ("r17");
937 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_bpermd()
939 (unsigned long long)r15, (unsigned long long)r17); in test_bpermd()
968 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
973 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
978 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
983 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1004 __asm__ __volatile__ ("divweu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1009 __asm__ __volatile__ ("divweuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1014 __asm__ __volatile__ ("divweu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
[all …]
Dtest_isa_2_06_part3.c45 register HWord_t r17 __asm__ ("r17");
934 __asm__ __volatile__ ("divdeu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
939 __asm__ __volatile__ ("divdeuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
944 __asm__ __volatile__ ("divdeu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
949 __asm__ __volatile__ ("divdeuo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divdeu()
970 __asm__ __volatile__ ("divwe %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
975 __asm__ __volatile__ ("divweo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
980 __asm__ __volatile__ ("divwe. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
985 __asm__ __volatile__ ("divweo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divwe()
1404 div_dw_tdata[i][0], div_dw_tdata[i][1], (signed long long) r17); in test_div_extensions()
[all …]
Dtest_isa_2_07_part1.c189 register HWord_t r17 __asm__ ("r17");
305 __asm__ __volatile__ ("lqarx %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); in test_stqcx()
308 __asm__ __volatile__ ("stqcx. %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); in test_stqcx()
318 __asm__ __volatile__ ("lqarx %0, %1, %2, 0" : :"r" (r14), "r" (r16),"r" (r17)); in test_lqarx()
1458 r17 = ZERO; in test_int_stq_three_regs()
1531 r17 = 0; in test_int_ldq_three_regs()
Djm-insns.c238 register HWord_t r17 __asm__ ("r17");
4710 res = r17; in test_int_three_args()
4758 res = r17; in test_int_two_args()
4790 res = r17; in test_int_one_arg()
4891 res = r17; in test_int_one_reg_imm16()
4939 r17 = 0; // rlwimi takes r17 as input: start with a clean slate. in rlwi_cb()
4956 res = r17; in rlwi_cb()
4997 res = r17; in rlwnm_cb()
5034 res = r17; in srawi_cb()
5130 res = r17; in mfcr_cb()
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dr31.ll6 …,~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r2…
/external/llvm/test/CodeGen/Hexagon/
Dremove_lsr.ll8 ; r17:16 = lsr(r11:10, #32)
11 ; r17:16 = lsr(r11:10, #32)
/external/openssl/crypto/aes/asm/
Daes-ia64.S42 te00=r16; te11=r17; te22=r18; te33=r19;
337 ld1 r17=[out0],4 }//;;
360 dep out1=r17,out1,16,8 //;;
376 extr.u r17=r16,8,8 // s0
390 { .mii; st1 [out2]=r17,4
714 ld1 r17=[out0],4 }//;;
737 dep out1=r17,out1,16,8 //;;
753 extr.u r17=r16,8,8 // s0
767 { .mii; st1 [out2]=r17,4
Daes-parisc.pl60 "%r17","%r18","%r19","%r20","%r21","%r22","%r23","%r26");
91 $PUSH %r17,`-$FRAME+14*$SIZE_T`(%sp)
176 $POP `-$FRAME+14*$SIZE_T`(%sp),%r17
560 $PUSH %r17,`-$FRAME+14*$SIZE_T`(%sp)
645 $POP `-$FRAME+14*$SIZE_T`(%sp),%r17
/external/llvm/test/MC/PowerPC/
Dppc64-regs.s22 #CHECK: .cfi_offset r17, 136
139 .cfi_offset r17,136
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td81 def R17 : Ri<17, "r17">, DwarfRegNum<[17]>;
111 def D8 : Rd<16, "r17:16", [R16, R17]>, DwarfRegNum<[48]>;
/external/valgrind/main/VEX/switchback/
Dtest_ppc_jm1.c144 register uint32_t r17 __asm__ ("r17");
3732 res = r17; in test_int_three_args()
3762 res = r17; in test_int_two_args()
3785 res = r17; in test_int_one_arg()
3853 res = r17; in test_int_one_reg_imm16()
3903 res = r17; in rlwi_cb()
3949 res = r17; in rlwnm_cb()
3985 res = r17; in srawi_cb()
4271 r17 = iargs[k]; in test_ppc405()
4280 res = r17; in test_ppc405()

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