/external/fio/engines/ |
D | rdma.c | 121 struct rdmaio_data *rd = td->io_ops->data; in client_recv() local 123 if (wc->byte_len != sizeof(rd->recv_buf)) { in client_recv() 129 if ((rd->rdma_protocol == FIO_RDMA_MEM_WRITE) || in client_recv() 130 (rd->rdma_protocol == FIO_RDMA_MEM_READ)) { in client_recv() 134 rd->rmt_nr = ntohl(rd->recv_buf.nr); in client_recv() 136 for (i = 0; i < rd->rmt_nr; i++) { in client_recv() 137 rd->rmt_us[i].buf = ntohll(rd->recv_buf.rmt_us[i].buf); in client_recv() 138 rd->rmt_us[i].rkey = ntohl(rd->recv_buf.rmt_us[i].rkey); in client_recv() 139 rd->rmt_us[i].size = ntohl(rd->recv_buf.rmt_us[i].size); in client_recv() 143 " len %d from peer\n", rd->rmt_us[i].rkey, in client_recv() [all …]
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/external/valgrind/main/none/tests/mips64/ |
D | cvm_ins.stdout.exp | 513 sne $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x0 514 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x130476dc 515 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x2608edb8 516 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x350c9b64 517 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x4c11db70 518 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x5f15adac 519 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x6a1936c8 520 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x791d4014 521 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x9823b6e0 522 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x8b27c03c [all …]
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D | arithmetic_instruction.stdout.exp-mips64r2 | 1 add $t0, $t1, $t2 :: rd 0xffffffffb1f740b4, rs 0x0, rt 0xffffffffb1f740b4 2 add $t0, $t1, $t2 :: rd 0xffffffffb5365d03, rs 0x0, rt 0xffffffffb5365d03 3 add $t0, $t1, $t2 :: rd 0xffffffffc1f7b748, rs 0x9823b6e, rt 0xffffffffb8757bda 4 add $t0, $t1, $t2 :: rd 0xffffffffc9f78d46, rs 0xd4326d9, rt 0xffffffffbcb4666d 5 add $t0, $t1, $t2 :: rd 0xffffffffb5f7ad44, rs 0x130476dc, rt 0xffffffffa2f33668 6 add $t0, $t1, $t2 :: rd 0xffffffffbdf7974a, rs 0x17c56b6b, rt 0xffffffffa6322bdf 7 add $t0, $t1, $t2 :: rd 0xffffffffc5f75ab8, rs 0x1a864db2, rt 0xffffffffab710d06 8 add $t0, $t1, $t2 :: rd 0xffffffffcdf760b6, rs 0x1e475005, rt 0xffffffffafb010b1 9 add $t0, $t1, $t2 :: rd 0xffffffffbe089ac4, rs 0x2608edb8, rt 0xffffffff97ffad0c 10 add $t0, $t1, $t2 :: rd 0xffffffffb608a0ca, rs 0x22c9f00f, rt 0xffffffff933eb0bb [all …]
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D | arithmetic_instruction.stdout.exp-mips64 | 1 add $t0, $t1, $t2 :: rd 0xffffffffb1f740b4, rs 0x0, rt 0xffffffffb1f740b4 2 add $t0, $t1, $t2 :: rd 0xffffffffb5365d03, rs 0x0, rt 0xffffffffb5365d03 3 add $t0, $t1, $t2 :: rd 0xffffffffc1f7b748, rs 0x9823b6e, rt 0xffffffffb8757bda 4 add $t0, $t1, $t2 :: rd 0xffffffffc9f78d46, rs 0xd4326d9, rt 0xffffffffbcb4666d 5 add $t0, $t1, $t2 :: rd 0xffffffffb5f7ad44, rs 0x130476dc, rt 0xffffffffa2f33668 6 add $t0, $t1, $t2 :: rd 0xffffffffbdf7974a, rs 0x17c56b6b, rt 0xffffffffa6322bdf 7 add $t0, $t1, $t2 :: rd 0xffffffffc5f75ab8, rs 0x1a864db2, rt 0xffffffffab710d06 8 add $t0, $t1, $t2 :: rd 0xffffffffcdf760b6, rs 0x1e475005, rt 0xffffffffafb010b1 9 add $t0, $t1, $t2 :: rd 0xffffffffbe089ac4, rs 0x2608edb8, rt 0xffffffff97ffad0c 10 add $t0, $t1, $t2 :: rd 0xffffffffb608a0ca, rs 0x22c9f00f, rt 0xffffffff933eb0bb [all …]
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/external/chromium_org/v8/src/arm64/ |
D | macro-assembler-arm64-inl.h | 46 void MacroAssembler::And(const Register& rd, in And() argument 50 DCHECK(!rd.IsZero()); in And() 51 LogicalMacro(rd, rn, operand, AND); in And() 55 void MacroAssembler::Ands(const Register& rd, in Ands() argument 59 DCHECK(!rd.IsZero()); in Ands() 60 LogicalMacro(rd, rn, operand, ANDS); in Ands() 71 void MacroAssembler::Bic(const Register& rd, in Bic() argument 75 DCHECK(!rd.IsZero()); in Bic() 76 LogicalMacro(rd, rn, operand, BIC); in Bic() 80 void MacroAssembler::Bics(const Register& rd, in Bics() argument [all …]
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D | assembler-arm64.cc | 1073 void Assembler::adr(const Register& rd, int imm21) { in adr() argument 1074 DCHECK(rd.Is64Bits()); in adr() 1075 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd)); in adr() 1079 void Assembler::adr(const Register& rd, Label* label) { in adr() argument 1080 adr(rd, LinkAndGetByteOffsetTo(label)); in adr() 1084 void Assembler::add(const Register& rd, in add() argument 1087 AddSub(rd, rn, operand, LeaveFlags, ADD); in add() 1091 void Assembler::adds(const Register& rd, in adds() argument 1094 AddSub(rd, rn, operand, SetFlags, ADD); in adds() 1105 void Assembler::sub(const Register& rd, in sub() argument [all …]
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D | assembler-arm64.h | 1081 void adr(const Register& rd, Label* label); 1082 void adr(const Register& rd, int imm21); 1086 void add(const Register& rd, 1091 void adds(const Register& rd, 1099 void sub(const Register& rd, 1104 void subs(const Register& rd, 1112 void neg(const Register& rd, 1116 void negs(const Register& rd, 1120 void adc(const Register& rd, 1125 void adcs(const Register& rd, [all …]
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/external/vixl/src/a64/ |
D | macro-assembler-a64.h | 99 void And(const Register& rd, 102 void Ands(const Register& rd, 105 void Bic(const Register& rd, 108 void Bics(const Register& rd, 111 void Orr(const Register& rd, 114 void Orn(const Register& rd, 117 void Eor(const Register& rd, 120 void Eon(const Register& rd, 124 void LogicalMacro(const Register& rd, 130 void Add(const Register& rd, [all …]
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D | assembler-a64.cc | 533 void Assembler::adr(const Register& rd, int imm21) { in adr() argument 534 VIXL_ASSERT(rd.Is64Bits()); in adr() 535 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd)); in adr() 539 void Assembler::adr(const Register& rd, Label* label) { in adr() argument 540 adr(rd, UpdateAndGetByteOffsetTo(label)); in adr() 544 void Assembler::add(const Register& rd, in add() argument 547 AddSub(rd, rn, operand, LeaveFlags, ADD); in add() 551 void Assembler::adds(const Register& rd, in adds() argument 554 AddSub(rd, rn, operand, SetFlags, ADD); in adds() 565 void Assembler::sub(const Register& rd, in sub() argument [all …]
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D | assembler-a64.h | 731 void adr(const Register& rd, Label* label); 734 void adr(const Register& rd, int imm21); 738 void add(const Register& rd, 743 void adds(const Register& rd, 751 void sub(const Register& rd, 756 void subs(const Register& rd, 764 void neg(const Register& rd, 768 void negs(const Register& rd, 772 void adc(const Register& rd, 777 void adcs(const Register& rd, [all …]
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D | macro-assembler-a64.cc | 49 void MacroAssembler::And(const Register& rd, in And() argument 53 LogicalMacro(rd, rn, operand, AND); in And() 57 void MacroAssembler::Ands(const Register& rd, in Ands() argument 61 LogicalMacro(rd, rn, operand, ANDS); in Ands() 72 void MacroAssembler::Bic(const Register& rd, in Bic() argument 76 LogicalMacro(rd, rn, operand, BIC); in Bic() 80 void MacroAssembler::Bics(const Register& rd, in Bics() argument 84 LogicalMacro(rd, rn, operand, BICS); in Bics() 88 void MacroAssembler::Orr(const Register& rd, in Orr() argument 92 LogicalMacro(rd, rn, operand, ORR); in Orr() [all …]
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/external/valgrind/main/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32-LE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32-BE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-BE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-LE | 2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001 4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000 5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001 6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff 7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff 8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000 9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728 10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728 11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 [all …]
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/external/valgrind/main/none/tests/arm/ |
D | v6intARM.stdout.exp | 2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z 8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N 11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C 12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC 13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C 17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N [all …]
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D | v6media.stdout.exp | 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[… 5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[… 6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[… 7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[… 9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x… 10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x… 11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x… 12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x… [all …]
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/external/chromium_org/third_party/libvpx/source/libvpx/vp9/encoder/ |
D | vp9_rd.c | 219 static void set_block_thresholds(const VP9_COMMON *cm, RD_OPT *rd) { in set_block_thresholds() argument 236 rd->threshes[segment_id][bsize][i] = in set_block_thresholds() 237 rd->thresh_mult[i] < thresh_max in set_block_thresholds() 238 ? rd->thresh_mult[i] * t / 4 in set_block_thresholds() 242 rd->threshes[segment_id][bsize][i] = in set_block_thresholds() 243 rd->thresh_mult_sub8x8[i] < thresh_max in set_block_thresholds() 244 ? rd->thresh_mult_sub8x8[i] * t / 4 in set_block_thresholds() 254 RD_OPT *const rd = &cpi->rd; in vp9_initialize_rd_consts() local 259 rd->RDDIV = RDDIV_BITS; // In bits (to multiply D by 128). in vp9_initialize_rd_consts() 260 rd->RDMULT = vp9_compute_rd_mult(cpi, cm->base_qindex + cm->y_dc_delta_q); in vp9_initialize_rd_consts() [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrVIS.td | 21 (outs RC:$rd), (ins RC:$rs1, RC:$rs2), 22 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 27 (outs I64Regs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), 28 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 31 let rd = 0, rs1 = 0, rs2 = 0 in 35 // For VIS Instructions with only rs1, rd operands. 39 (outs RC:$rd), (ins RC:$rs1), 40 !strconcat(OpcStr, " $rs1, $rd"), []>; 42 // For VIS Instructions with only rs2, rd operands. 46 (outs RC:$rd), (ins RC:$rs2), [all …]
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D | SparcInstrInfo.td | 252 (outs RC:$rd), (ins RC:$rs1, RC:$rs2), 253 !strconcat(OpcStr, " $rs1, $rs2, $rd"), 254 [(set Ty:$rd, (OpNode Ty:$rs1, Ty:$rs2))]>; 256 (outs RC:$rd), (ins RC:$rs1, immOp:$simm13), 257 !strconcat(OpcStr, " $rs1, $simm13, $rd"), 258 [(set Ty:$rd, (OpNode Ty:$rs1, (Ty simm13:$simm13)))]>; 265 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2), 266 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>; 268 (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13), 269 !strconcat(OpcStr, " $rs1, $simm13, $rd"), []>; [all …]
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/external/icu/icu4c/source/test/cintltst/ |
D | uregiontest.c | 362 const KnownRegion * rd; in TestKnownRegions() local 363 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestKnownRegions() 365 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestKnownRegions() 368 int32_t e = rd->numeric; in TestKnownRegions() 372 if (uregion_getType(r) != rd->type) { in TestKnownRegions() 373 …Expected region %s to be of type %d. Got: %d\n", uregion_getRegionCode(r), rd->type, uregion_getTy… in TestKnownRegions() 383 log_data_err("ERROR: Known region %s was not recognized.\n", rd->code); in TestKnownRegions() 389 const KnownRegion * rd; in TestGetContainedRegions() local 390 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestGetContainedRegions() 392 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestGetContainedRegions() [all …]
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/external/chromium_org/third_party/icu/source/test/cintltst/ |
D | uregiontest.c | 362 const KnownRegion * rd; in TestKnownRegions() local 363 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestKnownRegions() 365 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestKnownRegions() 368 int32_t e = rd->numeric; in TestKnownRegions() 372 if (uregion_getType(r) != rd->type) { in TestKnownRegions() 373 …Expected region %s to be of type %d. Got: %d\n", uregion_getRegionCode(r), rd->type, uregion_getTy… in TestKnownRegions() 383 log_data_err("ERROR: Known region %s was not recognized.\n", rd->code); in TestKnownRegions() 389 const KnownRegion * rd; in TestGetContainedRegions() local 390 for (rd = knownRegions; rd->code != NULL ; rd++ ) { in TestGetContainedRegions() 392 const URegion *r = uregion_getRegionFromCode(rd->code, &status); in TestGetContainedRegions() [all …]
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/external/vixl/doc/ |
D | supported-instructions.md | 16 void adc(const Register& rd, 25 void adcs(const Register& rd, 34 void add(const Register& rd, 43 void adds(const Register& rd, 52 void adr(const Register& rd, int imm21) 59 void adr(const Register& rd, Label* label) 66 void and_(const Register& rd, 75 void ands(const Register& rd, 84 inline void asr(const Register& rd, const Register& rn, unsigned shift) 91 void asrv(const Register& rd, const Register& rn, const Register& rm) [all …]
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/external/chromium_org/v8/src/mips64/ |
D | assembler-mips64.cc | 350 Register rd; in GetRdReg() local 351 rd.code_ = (instr & kRdFieldMask) >> kRdShift; in GetRdReg() 352 return rd; in GetRdReg() 564 uint32_t rd = GetRd(instr); in IsNop() local 574 rd == static_cast<uint32_t>(ToNumber(zero_reg)) && in IsNop() 853 Register rd, in GenInstrRegister() argument 856 DCHECK(rd.is_valid() && rs.is_valid() && rt.is_valid() && is_uint5(sa)); in GenInstrRegister() 858 | (rd.code() << kRdShift) | (sa << kSaShift) | func; in GenInstrRegister() 1411 void Assembler::jalr(Register rs, Register rd) { in jalr() argument 1414 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR); in jalr() [all …]
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/external/openssl/crypto/bn/asm/ |
D | sparcv8.S | 63 rd %y,%g1 74 rd %y,%g1 85 rd %y,%g1 95 rd %y,%g1 117 rd %y,%g1 128 rd %y,%g1 140 rd %y,%g1 176 rd %y,%g1 183 rd %y,%g1 191 rd %y,%g1 [all …]
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