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Searched refs:shamt (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dshift-bmi2.ll4 define i32 @shl32(i32 %x, i32 %shamt) nounwind uwtable readnone {
6 %shl = shl i32 %x, %shamt
28 define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
31 %shl = shl i32 %x, %shamt
55 define i64 @shl64(i64 %x, i64 %shamt) nounwind uwtable readnone {
57 %shl = shl i64 %x, %shamt
73 define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
76 %shl = shl i64 %x, %shamt
93 define i32 @lshr32(i32 %x, i32 %shamt) nounwind uwtable readnone {
95 %shl = lshr i32 %x, %shamt
[all …]
Dshift-and.ll12 %shamt = and i32 %t, 31
13 %res = shl i32 %val, %shamt
25 %shamt = and i32 %t, 63
26 %res = shl i32 %val, %shamt
40 %shamt = and i16 %t, 31
42 %tmp1 = ashr i16 %tmp, %shamt
51 %shamt = and i64 %t, 63
52 %res = lshr i64 %val, %shamt
60 %shamt = and i64 %t, 191
61 %res = lshr i64 %val, %shamt
Dvshift-4.ll10 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
11 %shl = shl <2 x i64> %val, %shamt
21 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1>
22 %shl = shl <2 x i64> %val, %shamt
31 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
32 %shl = shl <4 x i32> %val, %shamt
41 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1>
42 %shl = shl <4 x i32> %val, %shamt
51 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
52 %shl = shl <4 x i32> %val, %shamt
[all …]
Dvshift-5.ll12 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
13 %shl = shl <4 x i32> %val, %shamt
26 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
27 %shr = ashr <4 x i32> %val, %shamt
39 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
40 %shl = shl <4 x i32> %val, %shamt
52 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
53 %shr = ashr <4 x i32> %val, %shamt
/external/llvm/test/ExecutionEngine/MCJIT/
Dtest-shift.ll4 %shamt = add i8 0, 1 ; <i8> [#uses=8]
5 %shift.upgrd.1 = zext i8 %shamt to i32 ; <i32> [#uses=1]
8 %shift.upgrd.2 = zext i8 %shamt to i32 ; <i32> [#uses=1]
13 %shift.upgrd.5 = zext i8 %shamt to i32 ; <i32> [#uses=1]
16 %shift.upgrd.6 = zext i8 %shamt to i32 ; <i32> [#uses=1]
20 %shift.upgrd.7 = zext i8 %shamt to i64 ; <i64> [#uses=1]
23 %shift.upgrd.8 = zext i8 %shamt to i64 ; <i64> [#uses=1]
26 %shift.upgrd.9 = zext i8 %shamt to i64 ; <i64> [#uses=1]
29 %shift.upgrd.10 = zext i8 %shamt to i64 ; <i64> [#uses=1]
/external/llvm/test/ExecutionEngine/
Dtest-shift.ll4 %shamt = add i8 0, 1 ; <i8> [#uses=8]
5 %shift.upgrd.1 = zext i8 %shamt to i32 ; <i32> [#uses=1]
8 %shift.upgrd.2 = zext i8 %shamt to i32 ; <i32> [#uses=1]
13 %shift.upgrd.5 = zext i8 %shamt to i32 ; <i32> [#uses=1]
16 %shift.upgrd.6 = zext i8 %shamt to i32 ; <i32> [#uses=1]
20 %shift.upgrd.7 = zext i8 %shamt to i64 ; <i64> [#uses=1]
23 %shift.upgrd.8 = zext i8 %shamt to i64 ; <i64> [#uses=1]
26 %shift.upgrd.9 = zext i8 %shamt to i64 ; <i64> [#uses=1]
29 %shift.upgrd.10 = zext i8 %shamt to i64 ; <i64> [#uses=1]
Dtest-interp-vec-shift.ll4 %shamt = add <2 x i8> <i8 0, i8 0>, <i8 1, i8 2>
5 %shift.upgrd.1 = zext <2 x i8> %shamt to <2 x i32>
8 %shift.upgrd.2 = zext <2 x i8> %shamt to <2 x i32>
13 %shift.upgrd.5 = zext <2 x i8> %shamt to <2 x i32>
16 %shift.upgrd.6 = zext <2 x i8> %shamt to <2 x i32>
20 %shift.upgrd.7 = zext <2 x i8> %shamt to <2 x i64>
23 %shift.upgrd.8 = zext <2 x i8> %shamt to <2 x i64>
26 %shift.upgrd.9 = zext <2 x i8> %shamt to <2 x i64>
29 %shift.upgrd.10 = zext <2 x i8> %shamt to <2 x i64>
/external/llvm/test/CodeGen/PowerPC/
D2004-11-30-shr-var-crash.ll4 %shamt = add i8 0, 1 ; <i8> [#uses=1]
5 %shift.upgrd.1 = zext i8 %shamt to i64 ; <i64> [#uses=1]
/external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/
Dvalue.c132 unsigned long shamt; /* for SHR */ in value_finalize_scan() local
349 shamt = yasm_intnum_get_uint(e->terms[1].data.intn); in value_finalize_scan()
350 if ((shamt + value->rshift) > YASM_VALUE_RSHIFT_MAX) in value_finalize_scan()
354 value->rshift += shamt; in value_finalize_scan()
603 /*@only@*/ yasm_intnum *shamt = in yasm_value_get_intnum() local
605 yasm_intnum_calc(outval, YASM_EXPR_SHR, shamt); in yasm_value_get_intnum()
606 yasm_intnum_destroy(shamt); in yasm_value_get_intnum()
705 /*@only@*/ yasm_intnum *shamt = in yasm_value_output_basic() local
707 yasm_intnum_calc(outval, YASM_EXPR_SHR, shamt); in yasm_value_output_basic()
708 yasm_intnum_destroy(shamt); in yasm_value_output_basic()
/external/llvm/lib/Target/Mips/
DMipsInstrFormats.td19 // shamt - only used on shift instructions, contains the shift amount.
126 // Format R instruction class in Mips : <|opcode|rs|rt|rd|shamt|funct|>
136 bits<5> shamt;
145 let Inst{10-6} = shamt;
246 bits<5> shamt;
255 let Inst{10-6} = shamt;
DMicroMipsInstrFormats.td153 bits<5> shamt;
160 let Inst{15-11} = shamt;
DMips64InstrInfo.td33 // shamt must fit in 6 bits.
253 let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
DMipsInstrInfo.td543 // shamt field must fit in 5 bits.
618 InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
619 !strconcat(opstr, "\t$rd, $rt, $shamt"),
620 [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr> {
DMipsDSPInstrInfo.td1320 DSPPat<(Node ValTy:$a, Imm:$shamt), (Inst ValTy:$a, Imm:$shamt), Pred>;
DMips16InstrInfo.td502 bits<5> shamt = 0;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td852 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
857 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
904 def : Pat<(rotl GR32:$src, (i8 imm:$shamt)),
905 (RORX32ri GR32:$src, (ROT32L2R_imm8 imm:$shamt))>;
906 def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
907 (RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
910 def : Pat<(rotl (loadi32 addr:$src), (i8 imm:$shamt)),
911 (RORX32mi addr:$src, (ROT32L2R_imm8 imm:$shamt))>;
912 def : Pat<(rotl (loadi64 addr:$src), (i8 imm:$shamt)),
913 (RORX64mi addr:$src, (ROT64L2R_imm8 imm:$shamt))>;