/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrAtomics.td | 56 (am_unscaled8 GPR64sp:$Rn, simm9:$offset)), 57 (LDURBBi GPR64sp:$Rn, simm9:$offset)>; 71 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)), 72 (LDURHHi GPR64sp:$Rn, simm9:$offset)>; 86 (am_unscaled32 GPR64sp:$Rn, simm9:$offset)), 87 (LDURWi GPR64sp:$Rn, simm9:$offset)>; 101 (am_unscaled64 GPR64sp:$Rn, simm9:$offset)), 102 (LDURXi GPR64sp:$Rn, simm9:$offset)>; 142 (am_unscaled8 GPR64sp:$Rn, simm9:$offset), GPR32:$val), 143 (STURBBi GPR32:$val, GPR64sp:$Rn, simm9:$offset)>; [all …]
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D | AArch64InstrInfo.td | 1466 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset)))]>; 1469 (load (am_unscaled32 GPR64sp:$Rn, simm9:$offset)))]>; 1472 (load (am_unscaled8 GPR64sp:$Rn, simm9:$offset)))]>; 1475 (load (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>; 1478 (load (am_unscaled32 GPR64sp:$Rn, simm9:$offset)))]>; 1481 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset)))]>; 1484 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset)))]>; 1489 (zextloadi16 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>; 1493 (zextloadi8 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>; 1497 def : Pat<(v2f32 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))), [all …]
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D | AArch64InstrFormats.td | 216 // simm9 predicate - True if the immediate is in the range [-256, 255]. 221 def simm9 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -256 && Imm < 256; }]> { 2879 (ins GPR64sp:$Rn, simm9:$offset), asm, pattern>, 2890 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset), 2902 (ins prfop:$Rt, GPR64sp:$Rn, simm9:$offset), 2938 (ins GPR64sp:$Rn, simm9:$offset), asm>, 2949 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset), 2987 (ins GPR64sp:$Rn, simm9:$offset), asm, 2996 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset), 2999 (storeop (Ty regtype:$Rt), GPR64sp:$Rn, simm9:$offset))]>, [all …]
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/external/valgrind/main/VEX/priv/ |
D | host_arm64_defs.c | 230 ARM64AMode* ARM64AMode_RI9 ( HReg reg, Int simm9 ) { in ARM64AMode_RI9() argument 234 am->ARM64am.RI9.simm9 = simm9; in ARM64AMode_RI9() 235 vassert(-256 <= simm9 && simm9 <= 255); in ARM64AMode_RI9() 264 vex_printf("%d(", am->ARM64am.RI9.simm9); in ppARM64AMode() 3823 Int simm9 = am->ARM64am.RI9.simm9; in do_load_or_store8() local 3824 vassert(-256 <= simm9 && simm9 <= 255); in do_load_or_store8() 3826 simm9 & 0x1FF, X00, in do_load_or_store8() 3872 Int simm9 = am->ARM64am.RI9.simm9; in do_load_or_store16() local 3873 vassert(-256 <= simm9 && simm9 <= 255); in do_load_or_store16() 3875 simm9 & 0x1FF, X00, in do_load_or_store16() [all …]
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D | host_arm64_defs.h | 134 Int simm9; /* -256 .. +255 */ member 149 extern ARM64AMode* ARM64AMode_RI9 ( HReg reg, Int simm9 );
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D | host_arm_defs.h | 168 Int simm9; /* -255 .. 255 */ member 178 extern ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 );
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D | host_arm_defs.c | 287 ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ) { in ARMAMode2_RI() argument 291 am->ARMam2.RI.simm9 = simm9; in ARMAMode2_RI() 292 vassert(-255 <= simm9 && simm9 <= 255); in ARMAMode2_RI() 306 vex_printf("%d(", am->ARMam2.RI.simm9); in ppARMAMode2() 3136 if (am->ARMam2.RI.simm9 < 0) { in emit_ARMInstr() 3138 simm8 = -am->ARMam2.RI.simm9; in emit_ARMInstr() 3141 simm8 = am->ARMam2.RI.simm9; in emit_ARMInstr() 3183 if (am->ARMam2.RI.simm9 < 0) { in emit_ARMInstr() 3185 simm8 = -am->ARMam2.RI.simm9; in emit_ARMInstr() 3188 simm8 = am->ARMam2.RI.simm9; in emit_ARMInstr()
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D | guest_arm64_toIR.c | 3231 Long simm9 = (Long)sx_to_64(imm9, 9); in dis_ARM64_load_store() local 3232 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store() 3259 = wBack && simm9 < 0 && szB == 8 in dis_ARM64_load_store() 3292 nameIReg64orSP(nn), simm9); in dis_ARM64_load_store() 3607 ULong simm9 = sx_to_64(imm9, 9); in dis_ARM64_load_store() local 3610 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store() 3651 ch, nameIRegOrZR(is64, tt), nameIReg64orSP(nn), simm9); in dis_ARM64_load_store() 3683 ULong simm9 = sx_to_64(imm9, 9); in dis_ARM64_load_store() local 3686 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store() 3725 ch, nameIRegOrZR(is64, tt), nameIReg64orSP(nn), simm9); in dis_ARM64_load_store() [all …]
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D | host_arm64_isel.c | 853 && am->ARM64am.RI9.simm9 >= -256 in sane_AMode() 854 && am->ARM64am.RI9.simm9 <= 255 ); in sane_AMode()
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D | host_arm_isel.c | 819 && am->ARMam2.RI.simm9 >= -255 in sane_AMode2() 820 && am->ARMam2.RI.simm9 <= 255 ); in sane_AMode2()
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 355 def simm9 : Operand<i32>; 463 let MIOperandInfo = (ops ptr_rc, simm9);
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