| /external/openssl/crypto/sha/asm/ |
| D | sha1-mips.S | 43 srl $25,$8,24 # byte swap(0)
44 srl $6,$8,8
56 srl $6,$1,27
62 srl $2,$2,2
67 srl $25,$9,24 # byte swap(1)
68 srl $6,$9,8
80 srl $6,$24,27
86 srl $1,$1,2
91 srl $25,$10,24 # byte swap(2)
92 srl $6,$10,8
[all …]
|
| D | sha256-mips.S | 53 srl $13,$8,24 # byte swap(0)
54 srl $14,$8,8
63 srl $31,$24,6
67 srl $13,$24,11
71 srl $13,$24,25
78 srl $31,$1,2
83 srl $13,$1,13
87 srl $13,$1,22
105 srl $14,$9,24 # byte swap(1)
106 srl $15,$9,8
[all …]
|
| /external/openssl/crypto/aes/asm/ |
| D | aes-mips.S | 28 srl $1,$9,6
30 srl $2,$10,6
31 srl $24,$11,6
32 srl $25,$8,6
50 srl $1,$10,14
51 srl $2,$11,14
52 srl $24,$8,14
53 srl $25,$9,14
71 srl $1,$11,22
72 srl $2,$8,22
[all …]
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | shift-02.ll | 8 ; CHECK: srl %r2, 1
17 ; CHECK: srl %r2, 31
26 ; CHECK-NOT: srl %r2, 32
35 ; CHECK-NOT: srl %r2, -1{{.*}}
45 ; CHECK: srl %r2, 0(%r3)
54 ; CHECK: srl %r2, 10(%r3)
64 ; CHECK: srl %r2, 10(%r3)
76 ; CHECK: srl %r2, 4095(%r3)
87 ; CHECK: srl %r2, 0(%r3)
98 ; CHECK: srl %r2, 0({{%r[34]}})
[all …]
|
| D | setcc-02.ll | 11 ; CHECK-NEXT: srl %r2, 31
24 ; CHECK-NEXT: srl %r2, 31
36 ; CHECK-NEXT: srl %r2, 31
49 ; CHECK-NEXT: srl %r2, 31
85 ; CHECK-NEXT: srl %r2, 31
97 ; CHECK-NEXT: srl %r2, 31
133 ; CHECK-NEXT: srl %r2, 31
157 ; CHECK-NEXT: srl %r2, 31
169 ; CHECK-NEXT: srl %r2, 31
|
| D | setcc-01.ll | 11 ; CHECK-NEXT: srl %r2, 31
34 ; CHECK-NEXT: srl %r2, 31
69 ; CHECK-NEXT: srl %r2, 31
|
| /external/openssl/crypto/des/asm/ |
| D | des_enc.m4 | 153 srl $2, 4, local4
168 srl $1, 16, local4
182 srl $2, 2, local4
194 srl $1, 8, local4
207 srl $2, 1, local4
227 srl $1, 29, local4
230 srl $2, 29, local1
321 srl out1, 4, local0 ! rotate 4 right
326 srl local3, 8, local3 ! 3
335 srl out0, 24, local1 ! 7
[all …]
|
| /external/linux-tools-perf/perf-3.12.0/arch/sparc/lib/ |
| D | memcpy.S | 103 srl %t0, shir, %t5; \
104 srl %t1, shir, %t6; \
109 srl %t2, shir, %t1; \
110 srl %t3, shir, %t6; \
121 srl %t0, shir, %t4; \
122 srl %t1, shir, %t5; \
127 srl %t2, shir, %t4; \
128 srl %t3, shir, %t5; \
251 srl %g4, 1, %o4
410 srl %i2, 2, %g3
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | bswap.ll | 16 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
17 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
45 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $5, 8
46 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $5, 24
56 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
57 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
|
| /external/pixman/pixman/ |
| D | pixman-mips-dspr2-asm.S | 50 srl t1, a1, 5 /* t1 how many multiples of 32 bytes */
100 srl t1, a1, 5 /* t1 how many multiples of 32 bytes */
235 srl t8, a2, 3 /* t1 = how many multiples of 8 src pixels */
325 srl t9, a2, 2 /* t9 = how many multiples of 4 src pixels */
358 srl t4, t4, 8 /* t4 = 0 | R1 | G1 | B1 */
432 srl t7, t7, 8 /* t7 = 0 | R1 | G1 | B1 */
443 srl t7, t2, 16 /* t7 = 0 | 0 | R5 | G5 */
477 srl t7, t2, 16 /* t7 = 0 | 0 | xx | R5 */
521 srl t9, a2, 2 /* t9 = how many multiples of 4 src pixels */
553 srl t4, t4, 8 /* t4 = 0 | R1 | G1 | B1 */
[all …]
|
| D | pixman-mips-dspr2-asm.h | 279 srl \scratch2, \in_565, 0x1
285 srl \scratch2, \scratch1, 0x5
335 srl \scratch1, \in_8888, 0x5
337 srl \scratch2, \in_8888, 0x8
366 srl \out2_565, \out1_565, 16
518 srl \scratch2, \scratch2, 24
553 srl \scratch3, \scratch3, 24
555 srl \scratch4, \scratch4, 24
580 srl \scratch1, \scratch1, 24
605 srl \scratch1, \scratch1, 24
[all …]
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-shift-instructions.s | 14 # CHECK-EL: srl $4, $3, 7 # encoding: [0x83,0x00,0x40,0x38]
25 # CHECK-EB: srl $4, $3, 7 # encoding: [0x00,0x83,0x38,0x40]
33 srl $4, $3, 7
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| D | shift-dagcombine.ll | 31 ; CHECK-NOT: srl
33 ; CHECK-NOT: srl
39 ; CHECK-NOT: srl
42 ; CHECK-NOT: srl
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | valid.s | 94 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
95 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
96 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 110 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
111 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
112 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 138 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
139 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
140 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/MC/Sparc/ |
| D | sparc-alu-instructions.s | 55 ! CHECK: srl %g1, %g2, %g3 ! encoding: [0x87,0x30,0x40,0x02]
56 srl %g1, %g2, %g3
57 ! CHECK: srl %g1, 31, %g3 ! encoding: [0x87,0x30,0x60,0x1f]
58 srl %g1, 31, %g3
|
| /external/valgrind/main/none/tests/mips64/ |
| D | shift_instructions.stdout.exp-mips64 | 17665 srl $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
17666 srl $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
17667 srl $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
17668 srl $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
17669 srl $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
17670 srl $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
17671 srl $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
17672 srl $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
17673 srl $t0, $t1, 0x00 :: rt 0x9823b6e, rs 0x9823b6e, imm 0x0000
17674 srl $t2, $t3, 0x1f :: rt 0x0, rs 0x9823b6e, imm 0x001f
[all …]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 166 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
167 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
168 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/CodeGen/SPARC/ |
| D | ctpop.ll | 18 ; V9: srl %o0, 0, %o0
23 ; SPARC64: srl %o0, 0, %o0
|
| /external/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 168 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
169 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
170 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | valid.s | 186 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
187 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
188 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/test/MC/Mips/mips5/ |
| D | valid.s | 187 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
188 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
189 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 128 [(set GR8:$dst, (srl GR8:$src1, CL))], IIC_SR>;
131 [(set GR16:$dst, (srl GR16:$src1, CL))], IIC_SR>, OpSize16;
134 [(set GR32:$dst, (srl GR32:$src1, CL))], IIC_SR>, OpSize32;
137 [(set GR64:$dst, (srl GR64:$src1, CL))], IIC_SR>;
142 [(set GR8:$dst, (srl GR8:$src1, (i8 imm:$src2)))], IIC_SR>;
145 [(set GR16:$dst, (srl GR16:$src1, (i8 imm:$src2)))],
149 [(set GR32:$dst, (srl GR32:$src1, (i8 imm:$src2)))],
153 [(set GR64:$dst, (srl GR64:$src1, (i8 imm:$src2)))], IIC_SR>;
158 [(set GR8:$dst, (srl GR8:$src1, (i8 1)))], IIC_SR>;
161 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))], IIC_SR>, OpSize16;
[all …]
|
| /external/llvm/test/MC/Mips/mips64/ |
| D | valid.s | 203 … srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
204 … srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
205 … srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
|