| /external/llvm/test/MC/Mips/ |
| D | mips-control-instructions.s | 26 # CHECK32: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31]
27 # CHECK32: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1]
59 # CHECK64: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31]
60 # CHECK64: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1]
95 tgeu $0,$3
96 tgeu $0,$3,7
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| D | micromips-trap-instructions.s | 14 # CHECK-EL: tgeu $8, $9 # encoding: [0x28,0x01,0x3c,0x04]
29 # CHECK-EB: tgeu $8, $9 # encoding: [0x01,0x28,0x04,0x3c]
41 tgeu $8, $9, 0
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| /external/chromium_org/v8/test/cctest/ |
| D | test-disasm-mips.cc | 386 COMPARE(tgeu(a0, a1, 0), in TEST()
388 COMPARE(tgeu(s0, s1, 1023), in TEST()
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| D | test-disasm-mips64.cc | 539 COMPARE(tgeu(a0, a1, 0), in TEST()
541 COMPARE(tgeu(s0, s1, 1023), in TEST()
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| /external/llvm/test/MC/Disassembler/Mips/ |
| D | micromips.txt | 262 # CHECK: tgeu $8, $9, 0
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| D | micromips_le.txt | 262 # CHECK: tgeu $8, $9, 0
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 283 def TGEU_MM : MMRel, TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM_MM<0x10>;
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| D | MipsInstrInfo.td | 1153 def TGEU : MMRel, TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM<0x31>;
1488 def : MipsInstAlias<"tgeu $rs, $rt", (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0),
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| /external/chromium_org/v8/src/mips/ |
| D | assembler-mips.h | 820 void tgeu(Register rs, Register rt, uint16_t code);
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| D | assembler-mips.cc | 1822 void Assembler::tgeu(Register rs, Register rt, uint16_t code) { in tgeu() function in v8::internal::Assembler
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| /external/chromium_org/v8/src/mips64/ |
| D | assembler-mips64.h | 850 void tgeu(Register rs, Register rt, uint16_t code);
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| D | assembler-mips64.cc | 2017 void Assembler::tgeu(Register rs, Register rt, uint16_t code) { in tgeu() function in v8::internal::Assembler
|