| /external/pdfium/core/src/fxcodec/jbig2/ |
| D | JBig2_Image.cpp | 780 FX_DWORD s1, d1, d2, shift, shift1, shift2, tmp, tmp1, tmp2, maskL, maskR, maskM; in composeTo_opt2() local
840 tmp2 = JBIG2_GETDWORD(lineDst); in composeTo_opt2()
843 tmp = (tmp2 & ~maskM) | ((tmp1 | tmp2) & maskM); in composeTo_opt2()
846 tmp = (tmp2 & ~maskM) | ((tmp1 & tmp2) & maskM); in composeTo_opt2()
849 tmp = (tmp2 & ~maskM) | ((tmp1 ^ tmp2) & maskM); in composeTo_opt2()
852 tmp = (tmp2 & ~maskM) | ((~(tmp1 ^ tmp2)) & maskM); in composeTo_opt2()
855 tmp = (tmp2 & ~maskM) | (tmp1 & maskM); in composeTo_opt2()
869 tmp2 = JBIG2_GETDWORD(lineDst); in composeTo_opt2()
872 tmp = (tmp2 & ~maskM) | ((tmp1 | tmp2) & maskM); in composeTo_opt2()
875 tmp = (tmp2 & ~maskM) | ((tmp1 & tmp2) & maskM); in composeTo_opt2()
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | vshift.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = shl <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = shl <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = shl <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = shl <1 x i64> %tmp1, %tmp2
43 %tmp2 = shl <8 x i8> %tmp1, < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >
44 ret <8 x i8> %tmp2
[all …]
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| D | vbits.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = and <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = and <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = and <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = and <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <16 x i8>* %B
44 %tmp3 = and <16 x i8> %tmp1, %tmp2
[all …]
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| D | vneg.ll | 7 %tmp2 = sub <8 x i8> zeroinitializer, %tmp1
8 ret <8 x i8> %tmp2
15 %tmp2 = sub <4 x i16> zeroinitializer, %tmp1
16 ret <4 x i16> %tmp2
23 %tmp2 = sub <2 x i32> zeroinitializer, %tmp1
24 ret <2 x i32> %tmp2
31 %tmp2 = fsub <2 x float> < float -0.000000e+00, float -0.000000e+00 >, %tmp1
32 ret <2 x float> %tmp2
39 %tmp2 = sub <16 x i8> zeroinitializer, %tmp1
40 ret <16 x i8> %tmp2
[all …]
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| D | vshl.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = call <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
43 %tmp2 = load <8 x i8>* %B
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
[all …]
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| D | vqshl.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = call <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
43 %tmp2 = load <8 x i8>* %B
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
[all …]
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| D | vadd.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = add <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = add <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = add <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = add <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <2 x float>* %B
44 %tmp3 = fadd <2 x float> %tmp1, %tmp2
[all …]
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| D | vsub.ll | 7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = sub <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = sub <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>* %B
26 %tmp3 = sub <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>* %B
35 %tmp3 = sub <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <2 x float>* %B
44 %tmp3 = fsub <2 x float> %tmp1, %tmp2
[all …]
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| D | vrev.ll | 7 …%tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3…
8 ret <8 x i8> %tmp2
15 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
16 ret <4 x i16> %tmp2
23 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> <i32 1, i32 0>
24 ret <2 x i32> %tmp2
31 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> <i32 1, i32 0>
32 ret <2 x float> %tmp2
39 …%tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i3…
40 ret <16 x i8> %tmp2
[all …]
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| D | vabs.ll | 7 %tmp2 = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %tmp1)
8 ret <8 x i8> %tmp2
15 %tmp2 = call <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16> %tmp1)
16 ret <4 x i16> %tmp2
23 %tmp2 = call <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32> %tmp1)
24 ret <2 x i32> %tmp2
31 %tmp2 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %tmp1)
32 ret <2 x float> %tmp2
39 %tmp2 = call <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8> %tmp1)
40 ret <16 x i8> %tmp2
[all …]
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| D | vldlane.ll | 11 %tmp2 = load i8* %A, align 8
12 %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 3
21 %tmp2 = load i16* %A, align 8
22 %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2
31 %tmp2 = load i32* %A, align 8
32 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
41 %tmp2 = load i32* %A, align 4
42 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
50 %tmp2 = load float* %A, align 4
51 %tmp3 = insertelement <2 x float> %tmp1, float %tmp2, i32 1
[all …]
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| /external/openssl/crypto/bf/asm/ |
| D | bf-586.pl | 16 $tmp2="ebx";
35 &mov($tmp2,&wparam(0));
41 &mov($L,&DWP(0,$tmp2,"",0));
42 &mov($R,&DWP(4,$tmp2,"",0));
50 &mov($tmp2,&DWP(0,$P,"",0));
53 &xor($L,$tmp2);
58 &BF_ENCRYPT($i+1,$R,$L,$P,$tmp1,$tmp2,$tmp3,$tmp4,1);
62 &BF_ENCRYPT($i+2,$L,$R,$P,$tmp1,$tmp2,$tmp3,$tmp4,1);
69 &mov($tmp2,&DWP(($BF_ROUNDS+1)*4,$P,"",0));
72 &xor($L,$tmp2);
[all …]
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| /external/chromium_org/third_party/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| D | lpc_masking_model_mips.c | 36 int32_t tmp2, tmp3; in WebRtcIsacfix_CalculateResidualEnergyMIPS() local
55 : [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3), [tmp32] "=&r" (tmp32), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
71 : [tmp2] "r" (tmp2), [tmp3] "r" (tmp3) in WebRtcIsacfix_CalculateResidualEnergyMIPS()
75 if (((!(sign_1 || sign_2)) && (0x7FFFFFFF - sum64_hi < tmp2)) || in WebRtcIsacfix_CalculateResidualEnergyMIPS()
76 ((sign_1 && sign_2) && (sum64_hi + tmp2 > 0))) { in WebRtcIsacfix_CalculateResidualEnergyMIPS()
89 : [tmp2] "+r" (tmp2), [tmp3] "+r" (tmp3), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
103 : [tmp2] "r" (tmp2), [tmp3] "r" (tmp3) in WebRtcIsacfix_CalculateResidualEnergyMIPS()
119 int32_t tmp2, tmp3; in WebRtcIsacfix_CalculateResidualEnergyMIPS() local
141 : [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3), [tmp32] "=&r" (tmp32), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
156 : [tmp2] "+r" (tmp2), [tmp3] "+r" (tmp3), [sum64_hi] "+r" (sum64_hi), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
[all …]
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| /external/openssl/crypto/sha/asm/ |
| D | sha512-sparcv9.pl | 110 $tmp2="%g5";
176 sllx @pair[1],$tmp31,$tmp2 ! Xload($i)
181 or $tmp1,$tmp2,$tmp2
182 or @pair[1],$tmp2,$tmp2
184 add $h,$tmp2,$T1
185 $ST $tmp2,[%sp+`$bias+$frame+$i*$SZ`]
193 sllx @pair[1],$tmp31,$tmp2 ! Xload($i)
199 or $tmp1,$tmp2,$tmp2
201 or @pair[1],$tmp2,$tmp2
203 add $h,$tmp2,$T1
[all …]
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| /external/qemu/target-arm/ |
| D | translate.c | 217 TCGv tmp2 = tcg_temp_new_i32(); in gen_smul_dual() local
219 tcg_gen_ext16s_i32(tmp2, b); in gen_smul_dual()
220 tcg_gen_mul_i32(tmp1, tmp1, tmp2); in gen_smul_dual()
221 tcg_temp_free_i32(tmp2); in gen_smul_dual()
315 TCGv_i64 tmp2 = tcg_temp_new_i64(); in gen_mulu_i64_i32() local
319 tcg_gen_extu_i32_i64(tmp2, b); in gen_mulu_i64_i32()
321 tcg_gen_mul_i64(tmp1, tmp1, tmp2); in gen_mulu_i64_i32()
322 tcg_temp_free_i64(tmp2); in gen_mulu_i64_i32()
329 TCGv_i64 tmp2 = tcg_temp_new_i64(); in gen_muls_i64_i32() local
333 tcg_gen_ext_i32_i64(tmp2, b); in gen_muls_i64_i32()
[all …]
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| /external/libunwind/src/dwarf/ |
| D | Gexpr.c | 193 unw_word_t operand1 = 0, operand2 = 0, tmp1, tmp2, tmp3, end_addr; in dwarf_eval_expr() local
368 if ((ret = dwarf_readw (as, a, &tmp1, &tmp2, arg)) < 0) in dwarf_eval_expr()
370 push (tmp2); in dwarf_eval_expr()
386 tmp2 = u8; in dwarf_eval_expr()
392 tmp2 = u16; in dwarf_eval_expr()
399 tmp2 = u32; in dwarf_eval_expr()
403 tmp2 >>= 8; in dwarf_eval_expr()
405 tmp2 &= 0xffffff; in dwarf_eval_expr()
414 tmp2 = u64; in dwarf_eval_expr()
418 tmp2 >>= 64 - 8 * operand1; in dwarf_eval_expr()
[all …]
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| /external/llvm/test/Transforms/Reassociate/ |
| D | otherops.ll | 7 ; CHECK-NEXT: %tmp2 = mul i32 %arg, 144
8 ; CHECK-NEXT: ret i32 %tmp2
11 %tmp2 = mul i32 %tmp1, 12
12 ret i32 %tmp2
17 ; CHECK-NEXT: %tmp2 = and i32 %arg, 14
18 ; CHECK-NEXT: ret i32 %tmp2
21 %tmp2 = and i32 %tmp1, 14
22 ret i32 %tmp2
27 ; CHECK-NEXT: %tmp2 = or i32 %arg, 14
28 ; CHECK-NEXT: ret i32 %tmp2
[all …]
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| /external/aac/libFDK/include/arm/ |
| D | cplx_mul.h | 110 LONG tmp1,tmp2; in cplxMultDiv2() local
118 : "=&r"(tmp1), "=&r"(tmp2) in cplxMultDiv2()
123 *c_Im = tmp2; in cplxMultDiv2()
135 LONG tmp1, tmp2; in cplxMultDiv2() local
142 : "=&r"(tmp1), "=&r"(tmp2) in cplxMultDiv2()
147 *c_Im = tmp2; in cplxMultDiv2()
159 LONG tmp1, tmp2; in cplxMultAddDiv2() local
166 : "=&r"(tmp1), "=&r"(tmp2) in cplxMultAddDiv2()
171 *c_Im += tmp2; in cplxMultAddDiv2()
184 LONG tmp1, tmp2; in cplxMultDiv2() local
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-scalar-by-elem-mul.ll | 7 %tmp2 = fmul float %a, %tmp1;
8 ret float %tmp2;
15 %tmp2 = fmul float %tmp1, %a;
16 ret float %tmp2;
24 %tmp2 = fmul float %a, %tmp1;
25 ret float %tmp2;
32 %tmp2 = fmul float %tmp1, %a;
33 ret float %tmp2;
41 %tmp2 = fmul double %a, %tmp1;
42 ret double %tmp2;
[all …]
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| D | neon-mla-mls.ll | 7 %tmp2 = add <8 x i8> %C, %tmp1;
8 ret <8 x i8> %tmp2
14 %tmp2 = add <16 x i8> %C, %tmp1;
15 ret <16 x i8> %tmp2
21 %tmp2 = add <4 x i16> %C, %tmp1;
22 ret <4 x i16> %tmp2
28 %tmp2 = add <8 x i16> %C, %tmp1;
29 ret <8 x i16> %tmp2
35 %tmp2 = add <2 x i32> %C, %tmp1;
36 ret <2 x i32> %tmp2
[all …]
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/mips/ |
| D | mips_FFTInv_CCSToR_F32_real.c | 24 OMX_F32 factor, tmp1, tmp2; in mips_FFTInv_CCSToR_F32_real() local
44 tmp2 = p_buf[2].Re + p_buf[3].Re; in mips_FFTInv_CCSToR_F32_real()
48 pDst[0] = factor * (tmp1 + tmp2); in mips_FFTInv_CCSToR_F32_real()
49 pDst[2] = factor * (tmp1 - tmp2); in mips_FFTInv_CCSToR_F32_real()
68 tmp2 = p_tmp[0].Im + p_tmp[1].Im; in mips_FFTInv_CCSToR_F32_real()
77 p_tmp[0].Im = tmp2 + tmp6; in mips_FFTInv_CCSToR_F32_real()
78 p_tmp[2].Im = tmp2 - tmp6; in mips_FFTInv_CCSToR_F32_real()
95 tmp2 = p_buf[6].Re + p_buf[7].Re; in mips_FFTInv_CCSToR_F32_real()
99 tmp5 = tmp1 + tmp2; in mips_FFTInv_CCSToR_F32_real()
103 tmp2 = p_buf[4].Im - p_buf[5].Im; in mips_FFTInv_CCSToR_F32_real()
[all …]
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| D | mips_FFTFwd_RToCCS_F32_real.c | 23 OMX_F32 tmp1, tmp2, tmp3, tmp4; in mips_FFTFwd_RToCCS_F32_real() local
33 tmp2 = pSrc[p_bitrev[2]] + pSrc[p_bitrev[3]]; in mips_FFTFwd_RToCCS_F32_real()
37 p_dst[0].Re = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_real()
38 p_dst[2].Re = tmp1 - tmp2; in mips_FFTFwd_RToCCS_F32_real()
58 tmp2 = pSrc[p_bitrev[2]] + pSrc[p_bitrev[3]]; in mips_FFTFwd_RToCCS_F32_real()
62 p_tmp[0].Re = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_real()
63 p_tmp[2].Re = tmp1 - tmp2; in mips_FFTFwd_RToCCS_F32_real()
87 tmp2 = pSrc[p_bitrev[6]] + pSrc[p_bitrev[7]]; in mips_FFTFwd_RToCCS_F32_real()
88 tmp3 = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_real()
89 tmp4 = tmp1 - tmp2; in mips_FFTFwd_RToCCS_F32_real()
[all …]
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| D | mips_FFTFwd_RToCCS_F32_complex.c | 30 OMX_F32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8; in mips_FFTFwd_RToCCS_F32_complex() local
55 tmp2 = p_src[p_bitrev[2]].Re + p_src[p_bitrev[3]].Re; in mips_FFTFwd_RToCCS_F32_complex()
59 p_tmp[0].Re = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_complex()
60 p_tmp[2].Re = tmp1 - tmp2; in mips_FFTFwd_RToCCS_F32_complex()
65 tmp2 = p_src[p_bitrev[2]].Re - p_src[p_bitrev[3]].Re; in mips_FFTFwd_RToCCS_F32_complex()
71 p_tmp[1].Im = tmp3 - tmp2; in mips_FFTFwd_RToCCS_F32_complex()
72 p_tmp[3].Im = tmp3 + tmp2; in mips_FFTFwd_RToCCS_F32_complex()
87 tmp2 = p_src[p_bitrev[6]].Re + p_src[p_bitrev[7]].Re; in mips_FFTFwd_RToCCS_F32_complex()
91 tmp5 = tmp1 + tmp2; in mips_FFTFwd_RToCCS_F32_complex()
92 tmp1 = tmp1 - tmp2; in mips_FFTFwd_RToCCS_F32_complex()
[all …]
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| /external/valgrind/main/none/tests/s390x/ |
| D | mul.h | 6 unsigned long tmp2 = m1; \
12 : "+d" (tmp1), "+d" (tmp2) \
15 printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, m2, tmp1, tmp2); \
21 unsigned long tmp2 = m1; \
27 : "+d" (tmp1), "+d" (tmp2) \
30 printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, m2, tmp1, tmp2); \
36 unsigned long tmp2 = m1; \
42 : "+d" (tmp1), "+d" (tmp2) \
44 printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, (unsigned long) m2, tmp1, tmp2); \
50 unsigned long tmp2 = m1; \
[all …]
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| /external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
| D | resample_by_2_mips.c | 151 int32_t tmp1, tmp2, diff; in WebRtcSpl_DownsampleBy2() local
161 tmp2 = MUL_ACCUM_2(kResampleAllpass2[1], diff, state1); in WebRtcSpl_DownsampleBy2()
163 diff = tmp2 - state3; in WebRtcSpl_DownsampleBy2()
165 state2 = tmp2; in WebRtcSpl_DownsampleBy2()
173 tmp2 = MUL_ACCUM_1(kResampleAllpass1[1], diff, state5); in WebRtcSpl_DownsampleBy2()
175 diff = tmp2 - state7; in WebRtcSpl_DownsampleBy2()
177 state6 = tmp2; in WebRtcSpl_DownsampleBy2()
190 tmp2 = MUL_ACCUM_2(kResampleAllpass2[1], diff, state1); in WebRtcSpl_DownsampleBy2()
192 diff = tmp2 - state3; in WebRtcSpl_DownsampleBy2()
194 state2 = tmp2; in WebRtcSpl_DownsampleBy2()
[all …]
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