Searched refs:CSINC (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 45 CSINC, // Conditional select increment. enumerator
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| D | AArch64SchedCyclone.td | 144 // CSEL,CSINC,CSINV,CSNEG
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| D | AArch64ISelLowering.cpp | 659 case AArch64ISD::CSINC: return "AArch64ISD::CSINC"; in getTargetNodeName()
3291 Opcode = AArch64ISD::CSINC; in LowerSELECT_CC()
3299 Opcode = AArch64ISD::CSINC; in LowerSELECT_CC()
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| D | AArch64InstrInfo.td | 134 def AArch64csinc : SDNode<"AArch64ISD::CSINC", SDT_AArch64CSel>;
905 defm CSINC : CondSelectOp<0, 0b01, "csinc", inc>;
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_64.c | 80 #define CSINC 0x9a800400 macro
1955 FAIL_IF(push_inst(compiler, CSINC | (cc << 12) | RD(dst_r) | RN(TMP_ZERO) | RM(TMP_ZERO))); in sljit_emit_op_flags()
1977 FAIL_IF(push_inst(compiler, CSINC | (cc << 12) | RD(TMP_REG2) | RN(TMP_ZERO) | RM(TMP_ZERO))); in sljit_emit_op_flags()
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-early-ifcvt.ll | 396 ; This function from 175.vpr folds an ADDWri into a CSINC.
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| /external/vixl/src/a64/ |
| D | constants-a64.h | 798 CSINC = CSINC_w, enumerator
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| D | assembler-a64.cc | 793 ConditionalSelect(rd, rn, rm, cond, CSINC); in csinc()
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| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 916 CSINC = CSINC_w, enumerator
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| D | assembler-arm64.cc | 1340 ConditionalSelect(rd, rn, rm, cond, CSINC); in csinc()
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