57 void Arm64Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1,  in GenCmpLong()
71 void Arm64Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,  in GenShiftOpLong()
198   RegLocation rl_dest = mir_graph_->GetDest(mir);  in GenSelect()  local
417                                       RegLocation rl_src, RegLocation rl_dest, int lit) {  in SmallLiteralDivRem()
461                                         RegLocation rl_src, RegLocation rl_dest, int64_t lit) {  in SmallLiteralDivRem64()
530                                     RegLocation rl_src, RegLocation rl_dest, int lit) {  in HandleEasyDivRem()
537                                       RegLocation rl_src, RegLocation rl_dest, int64_t lit) {  in HandleEasyDivRem64()
602 bool Arm64Mir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) {  in EasyMultiply()
608 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit,  in GenDivRemLit()
615 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {  in GenDivRemLit()
629 RegLocation Arm64Mir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1,  in GenDivRem()
636 RegLocation Arm64Mir2Lir::GenDivRem(RegLocation rl_dest, RegStorage r_src1, RegStorage r_src2,  in GenDivRem()
666   RegLocation rl_dest = InlineTarget(info);  in GenInlinedAbsInt()  local
681   RegLocation rl_dest = InlineTargetWide(info);  in GenInlinedAbsLong()  local
699   RegLocation rl_dest = (is_long) ? InlineTargetWide(info) : InlineTarget(info);  in GenInlinedMinMax()  local
710   RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info);  in GenInlinedPeek()  local
749   RegLocation rl_dest = InlineTarget(info);  // boolean place for result  in GenInlinedCas()  local
978 void Arm64Mir2Lir::GenMaddMsubInt(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,  in GenMaddMsubInt()
989 void Arm64Mir2Lir::GenMaddMsubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,  in GenMaddMsubLong()
1076 void Arm64Mir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) {  in GenIntToLong()
1085 void Arm64Mir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest,  in GenDivRemLong()
1105 void Arm64Mir2Lir::GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,  in GenLongOp()
1116 void Arm64Mir2Lir::GenNegLong(RegLocation rl_dest, RegLocation rl_src) {  in GenNegLong()
1125 void Arm64Mir2Lir::GenNotLong(RegLocation rl_dest, RegLocation rl_src) {  in GenNotLong()
1134 void Arm64Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest,  in GenArithOpLong()
1186                              RegLocation rl_index, RegLocation rl_dest, int scale) {  in GenArrayGet()
1343                                      RegLocation rl_dest, RegLocation rl_src, RegLocation rl_shift,  in GenShiftImmOpLong()
1375 void Arm64Mir2Lir::GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,  in GenArithImmOpLong()
1786   RegLocation rl_dest = IsWide(size) ? InlineTargetWide(info) : InlineTarget(info);  // result reg  in GenInlinedReverseBits()  local