Lines Matching refs:reg_class
115 RegStorage Mir2Lir::LoadArg(size_t in_position, RegisterClass reg_class, bool wide) { in LoadArg() argument
146 reg_arg = wide ? AllocTypedTempWide(false, reg_class) : AllocTypedTemp(false, reg_class); in LoadArg()
150 if (!RegClassMatches(reg_class, reg_arg)) { in LoadArg()
152 RegStorage new_reg = AllocTypedTempWide(false, reg_class); in LoadArg()
156 RegStorage new_reg = AllocTypedTemp(false, reg_class); in LoadArg()
286 RegisterClass reg_class = RegClassForFieldLoadStore(size, data.is_volatile); in GenSpecialIGet() local
290 if (!RegClassMatches(reg_class, r_result)) { in GenSpecialIGet()
291 r_result = IsWide(size) ? AllocTypedTempWide(rl_dest.fp, reg_class) in GenSpecialIGet()
292 : AllocTypedTemp(rl_dest.fp, reg_class); in GenSpecialIGet()
360 RegisterClass reg_class = RegClassForFieldLoadStore(size, data.is_volatile); in GenSpecialIPut() local
361 RegStorage reg_src = LoadArg(data.src_arg, reg_class, IsWide(size)); in GenSpecialIPut()
385 RegisterClass reg_class = ShortyToRegClass(cu_->shorty[0]); in GenSpecialIdentity() local
386 RegLocation rl_dest = wide ? GetReturnWide(reg_class) : GetReturn(reg_class); in GenSpecialIdentity()