Lines Matching refs:address
47 void X86_64Assembler::call(const Address& address) { in call() argument
49 EmitOptionalRex32(address); in call()
51 EmitOperand(2, address); in call()
70 void X86_64Assembler::pushq(const Address& address) { in pushq() argument
72 EmitOptionalRex32(address); in pushq()
74 EmitOperand(6, address); in pushq()
98 void X86_64Assembler::popq(const Address& address) { in popq() argument
100 EmitOptionalRex32(address); in popq()
102 EmitOperand(0, address); in popq()
1191 void X86_64Assembler::xchgl(CpuRegister reg, const Address& address) { in xchgl() argument
1193 EmitOptionalRex32(reg, address); in xchgl()
1195 EmitOperand(reg.LowBits(), address); in xchgl()
1199 void X86_64Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw() argument
1201 EmitOptionalRex32(address); in cmpw()
1203 EmitComplex(7, address, imm); in cmpw()
1222 void X86_64Assembler::cmpl(CpuRegister reg, const Address& address) { in cmpl() argument
1224 EmitOptionalRex32(reg, address); in cmpl()
1226 EmitOperand(reg.LowBits(), address); in cmpl()
1230 void X86_64Assembler::cmpl(const Address& address, CpuRegister reg) { in cmpl() argument
1232 EmitOptionalRex32(reg, address); in cmpl()
1234 EmitOperand(reg.LowBits(), address); in cmpl()
1238 void X86_64Assembler::cmpl(const Address& address, const Immediate& imm) { in cmpl() argument
1240 EmitOptionalRex32(address); in cmpl()
1241 EmitComplex(7, address, imm); in cmpl()
1261 void X86_64Assembler::cmpq(CpuRegister reg, const Address& address) { in cmpq() argument
1263 EmitRex64(reg, address); in cmpq()
1265 EmitOperand(reg.LowBits(), address); in cmpq()
1269 void X86_64Assembler::cmpq(const Address& address, const Immediate& imm) { in cmpq() argument
1272 EmitRex64(address); in cmpq()
1273 EmitComplex(7, address, imm); in cmpq()
1285 void X86_64Assembler::addl(CpuRegister reg, const Address& address) { in addl() argument
1287 EmitOptionalRex32(reg, address); in addl()
1289 EmitOperand(reg.LowBits(), address); in addl()
1301 void X86_64Assembler::testl(CpuRegister reg, const Address& address) { in testl() argument
1303 EmitOptionalRex32(reg, address); in testl()
1305 EmitOperand(reg.LowBits(), address); in testl()
1343 void X86_64Assembler::testq(CpuRegister reg, const Address& address) { in testq() argument
1345 EmitRex64(reg, address); in testq()
1347 EmitOperand(reg.LowBits(), address); in testq()
1359 void X86_64Assembler::andl(CpuRegister reg, const Address& address) { in andl() argument
1361 EmitOptionalRex32(reg, address); in andl()
1363 EmitOperand(reg.LowBits(), address); in andl()
1406 void X86_64Assembler::orl(CpuRegister reg, const Address& address) { in orl() argument
1408 EmitOptionalRex32(reg, address); in orl()
1410 EmitOperand(reg.LowBits(), address); in orl()
1453 void X86_64Assembler::xorl(CpuRegister reg, const Address& address) { in xorl() argument
1455 EmitOptionalRex32(reg, address); in xorl()
1457 EmitOperand(reg.LowBits(), address); in xorl()
1559 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { in addq() argument
1561 EmitRex64(dst, address); in addq()
1563 EmitOperand(dst.LowBits(), address); in addq()
1576 void X86_64Assembler::addl(const Address& address, CpuRegister reg) { in addl() argument
1578 EmitOptionalRex32(reg, address); in addl()
1580 EmitOperand(reg.LowBits(), address); in addl()
1584 void X86_64Assembler::addl(const Address& address, const Immediate& imm) { in addl() argument
1586 EmitOptionalRex32(address); in addl()
1587 EmitComplex(0, address, imm); in addl()
1622 void X86_64Assembler::subq(CpuRegister reg, const Address& address) { in subq() argument
1624 EmitRex64(reg, address); in subq()
1626 EmitOperand(reg.LowBits() & 7, address); in subq()
1630 void X86_64Assembler::subl(CpuRegister reg, const Address& address) { in subl() argument
1632 EmitOptionalRex32(reg, address); in subl()
1634 EmitOperand(reg.LowBits(), address); in subl()
1697 void X86_64Assembler::imull(CpuRegister reg, const Address& address) { in imull() argument
1699 EmitOptionalRex32(reg, address); in imull()
1702 EmitOperand(reg.LowBits(), address); in imull()
1740 void X86_64Assembler::imulq(CpuRegister reg, const Address& address) { in imulq() argument
1742 EmitRex64(reg, address); in imulq()
1745 EmitOperand(reg.LowBits(), address); in imulq()
1765 void X86_64Assembler::imull(const Address& address) { in imull() argument
1767 EmitOptionalRex32(address); in imull()
1769 EmitOperand(5, address); in imull()
1781 void X86_64Assembler::mull(const Address& address) { in mull() argument
1783 EmitOptionalRex32(address); in mull()
1785 EmitOperand(4, address); in mull()
1961 void X86_64Assembler::jmp(const Address& address) { in jmp() argument
1963 EmitOptionalRex32(address); in jmp()
1965 EmitOperand(4, address); in jmp()
1996 void X86_64Assembler::cmpxchgl(const Address& address, CpuRegister reg) { in cmpxchgl() argument
1998 EmitOptionalRex32(reg, address); in cmpxchgl()
2001 EmitOperand(reg.LowBits(), address); in cmpxchgl()
2005 void X86_64Assembler::cmpxchgq(const Address& address, CpuRegister reg) { in cmpxchgq() argument
2007 EmitRex64(reg, address); in cmpxchgq()
2010 EmitOperand(reg.LowBits(), address); in cmpxchgq()