Lines Matching refs:MBBI
89 MachineBasicBlock::iterator MBBI; member
93 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {} in MemOpQueueEntry()
102 MachineBasicBlock::iterator MBBI,
105 bool MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
132 MachineBasicBlock::iterator &MBBI);
134 MachineBasicBlock::iterator MBBI,
139 MachineBasicBlock::iterator MBBI,
379 MachineBasicBlock::iterator MBBI, in UpdateBaseRegUses() argument
386 for (; MBBI != MBB.end(); ++MBBI) { in UpdateBaseRegUses()
388 unsigned Opc = MBBI->getOpcode(); in UpdateBaseRegUses()
390 if (MBBI->readsRegister(Base)) { in UpdateBaseRegUses()
403 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3); in UpdateBaseRegUses()
408 unsigned InstrSrcReg = MBBI->getOperand(0).getReg(); in UpdateBaseRegUses()
416 !definesCPSR(MBBI)) { in UpdateBaseRegUses()
421 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3); in UpdateBaseRegUses()
440 } else if (definesCPSR(MBBI) || MBBI->isCall() || MBBI->isBranch()) { in UpdateBaseRegUses()
449 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII->get(ARM::tSUBi8), Base), true) in UpdateBaseRegUses()
455 if (MBBI->killsRegister(Base)) in UpdateBaseRegUses()
466 if (MBBI != MBB.end()) --MBBI; in UpdateBaseRegUses()
468 BuildMI(MBB, MBBI, dl, TII->get(ARM::tSUBi8), Base), true) in UpdateBaseRegUses()
479 MachineBasicBlock::iterator MBBI, in MergeOps() argument
493 (MBB.computeRegisterLiveness(TRI, ARM::CPSR, std::prev(MBBI), 15) == in MergeOps()
585 BuildMI(MBB, MBBI, dl, TII->get(ARM::tMOVSr), NewBase) in MergeOps()
588 BuildMI(MBB, MBBI, dl, TII->get(ARM::tMOVr), NewBase) in MergeOps()
598 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase) in MergeOps()
602 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase), true) in MergeOps()
606 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase) in MergeOps()
640 MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode)); in MergeOps()
649 UpdateBaseRegUses(MBB, MBBI, dl, Base, NumRegs, Pred, PredReg); in MergeOps()
653 MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode)); in MergeOps()
691 MachineInstr &MI = *MemOps[i].MBBI; in findUsesOfImpDef()
767 for (MIOperands MO(memOps[i].MBBI); MO.isValid(); ++MO) { in MergeOpsUpdate()
783 MachineBasicBlock::iterator Loc = memOps[insertAfter].MBBI; in MergeOpsUpdate()
807 int Idx = memOps[j].MBBI->findRegisterUseOperandIdx(Reg, true); in MergeOpsUpdate()
809 memOps[j].MBBI->getOperand(Idx).setIsKill(false); in MergeOpsUpdate()
814 MBB.erase(memOps[i].MBBI); in MergeOpsUpdate()
818 memOps[i].MBBI = Merges.back(); in MergeOpsUpdate()
824 MemOp.Offset = getMemoryOpOffset(MemOp.MBBI); in MergeOpsUpdate()
840 MachineBasicBlock::iterator Loc = MemOps[SIndex].MBBI; in MergeLDR_STR()
868 const MachineOperand &MO = MemOps[i].MBBI->getOperand(0); in MergeLDR_STR()
899 Loc = MemOps[i].MBBI; in MergeLDR_STR()
1101 MachineBasicBlock::iterator MBBI, in MergeBaseUpdateLSMultiple() argument
1107 MachineInstr *MI = MBBI; in MergeBaseUpdateLSMultiple()
1127 if (MBBI != BeginMBBI) { in MergeBaseUpdateLSMultiple()
1128 MachineBasicBlock::iterator PrevMBBI = std::prev(MBBI); in MergeBaseUpdateLSMultiple()
1146 if (!DoMerge && MBBI != EndMBBI) { in MergeBaseUpdateLSMultiple()
1147 MachineBasicBlock::iterator NextMBBI = std::next(MBBI); in MergeBaseUpdateLSMultiple()
1170 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) in MergeBaseUpdateLSMultiple()
1182 MBB.erase(MBBI); in MergeBaseUpdateLSMultiple()
1239 MachineBasicBlock::iterator MBBI, in MergeBaseUpdateLoadStore() argument
1247 MachineInstr *MI = MBBI; in MergeBaseUpdateLoadStore()
1278 if (MBBI != BeginMBBI) { in MergeBaseUpdateLoadStore()
1279 MachineBasicBlock::iterator PrevMBBI = std::prev(MBBI); in MergeBaseUpdateLoadStore()
1297 if (!DoMerge && MBBI != EndMBBI) { in MergeBaseUpdateLoadStore()
1298 MachineBasicBlock::iterator NextMBBI = std::next(MBBI); in MergeBaseUpdateLoadStore()
1327 BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) in MergeBaseUpdateLoadStore()
1338 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) in MergeBaseUpdateLoadStore()
1343 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) in MergeBaseUpdateLoadStore()
1350 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) in MergeBaseUpdateLoadStore()
1362 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base) in MergeBaseUpdateLoadStore()
1368 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base) in MergeBaseUpdateLoadStore()
1373 MBB.erase(MBBI); in MergeBaseUpdateLoadStore()
1436 MachineBasicBlock::iterator Loc = MemOps[0].MBBI; in AdvanceRS()
1441 Loc = MemOps[i].MBBI; in AdvanceRS()
1450 MachineBasicBlock::iterator &MBBI, in InsertLDR_STR() argument
1459 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(), in InsertLDR_STR()
1465 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(), in InsertLDR_STR()
1474 MachineBasicBlock::iterator &MBBI) { in FixInvalidRegPairOp() argument
1475 MachineInstr *MI = &*MBBI; in FixInvalidRegPairOp()
1492 MachineBasicBlock::iterator NewBBI = MBBI; in FixInvalidRegPairOp()
1516 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc)) in FixInvalidRegPairOp()
1523 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc)) in FixInvalidRegPairOp()
1532 NewBBI = std::prev(MBBI); in FixInvalidRegPairOp()
1543 DebugLoc dl = MBBI->getDebugLoc(); in FixInvalidRegPairOp()
1550 InsertLDR_STR(MBB, MBBI, OffImm+4, isLd, dl, NewOpc2, in FixInvalidRegPairOp()
1554 NewBBI = std::prev(MBBI); in FixInvalidRegPairOp()
1555 InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc, in FixInvalidRegPairOp()
1570 InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc, in FixInvalidRegPairOp()
1574 NewBBI = std::prev(MBBI); in FixInvalidRegPairOp()
1575 InsertLDR_STR(MBB, MBBI, OffImm+4, isLd, dl, NewOpc2, in FixInvalidRegPairOp()
1587 MBBI = NewBBI; in FixInvalidRegPairOp()
1608 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in LoadStoreMultipleOpti() local
1609 while (MBBI != E) { in LoadStoreMultipleOpti()
1610 if (FixInvalidRegPairOp(MBB, MBBI)) in LoadStoreMultipleOpti()
1617 bool isMemOp = isMemoryOp(MBBI); in LoadStoreMultipleOpti()
1619 int Opcode = MBBI->getOpcode(); in LoadStoreMultipleOpti()
1620 unsigned Size = getLSMultipleTransferSize(MBBI); in LoadStoreMultipleOpti()
1621 const MachineOperand &MO = MBBI->getOperand(0); in LoadStoreMultipleOpti()
1624 unsigned Base = MBBI->getOperand(1).getReg(); in LoadStoreMultipleOpti()
1626 ARMCC::CondCodes Pred = getInstrPredicate(MBBI, PredReg); in LoadStoreMultipleOpti()
1627 int Offset = getMemoryOpOffset(MBBI); in LoadStoreMultipleOpti()
1637 Clobber = (isi32Load(Opcode) && Base == MBBI->getOperand(0).getReg()); in LoadStoreMultipleOpti()
1648 if (TRI->regsOverlap(Reg, I->MBBI->getOperand(0).getReg())) { in LoadStoreMultipleOpti()
1661 MemOps.push_back(MemOpQueueEntry(Offset, Reg, isKill, Position, MBBI)); in LoadStoreMultipleOpti()
1675 Position, MBBI)); in LoadStoreMultipleOpti()
1683 Position, MBBI)); in LoadStoreMultipleOpti()
1697 if (MBBI->isDebugValue()) { in LoadStoreMultipleOpti()
1698 ++MBBI; in LoadStoreMultipleOpti()
1699 if (MBBI == E) in LoadStoreMultipleOpti()
1704 ++MBBI; in LoadStoreMultipleOpti()
1705 if (MBBI == E) in LoadStoreMultipleOpti()
1723 RS->forward(std::prev(MBBI)); in LoadStoreMultipleOpti()
1733 if (MergeBaseUpdateLSMultiple(MBB, Merges[i], Advance, MBBI)) in LoadStoreMultipleOpti()
1741 if (MergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI)) in LoadStoreMultipleOpti()
1745 RS->skipTo(std::prev(MBBI)); in LoadStoreMultipleOpti()
1749 if (MergeBaseUpdateLoadStore(MBB, MemOps[0].MBBI, TII, Advance, MBBI)) { in LoadStoreMultipleOpti()
1751 RS->forward(std::prev(MBBI)); in LoadStoreMultipleOpti()
1767 if (!Advance && !isMemOp && MBBI != E) { in LoadStoreMultipleOpti()
1769 ++MBBI; in LoadStoreMultipleOpti()
1791 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); in MergeReturnIntoLDM() local
1792 if (MBBI != MBB.begin() && in MergeReturnIntoLDM()
1793 (MBBI->getOpcode() == ARM::BX_RET || in MergeReturnIntoLDM()
1794 MBBI->getOpcode() == ARM::tBX_RET || in MergeReturnIntoLDM()
1795 MBBI->getOpcode() == ARM::MOVPCLR)) { in MergeReturnIntoLDM()
1796 MachineInstr *PrevMI = std::prev(MBBI); in MergeReturnIntoLDM()
1809 PrevMI->copyImplicitOps(*MBB.getParent(), &*MBBI); in MergeReturnIntoLDM()
1810 MBB.erase(MBBI); in MergeReturnIntoLDM()
2202 MachineBasicBlock::iterator MBBI = MBB->begin(); in RescheduleLoadStoreInstrs() local
2204 while (MBBI != E) { in RescheduleLoadStoreInstrs()
2205 for (; MBBI != E; ++MBBI) { in RescheduleLoadStoreInstrs()
2206 MachineInstr *MI = MBBI; in RescheduleLoadStoreInstrs()
2209 ++MBBI; in RescheduleLoadStoreInstrs()
2286 if (MBBI != E) { in RescheduleLoadStoreInstrs()