Lines Matching refs:latency
435 // no delay slots, so the latency of a branch is unimportant
469 // Extra latency cycles since wbck is 2 cycles
478 // Extra latency cycles since wbck is 2 cycles
488 // Extra latency cycles since wbck is 4 cycles
497 // Extra latency cycles since wbck is 4 cycles
669 // Extra 1 latency cycle since wbck is 2 cycles
678 // Extra 1 latency cycle since wbck is 2 cycles
709 // FIXME: Result latency is 1 if address is 64-bit aligned.
881 // Extra latency cycles since wbck is 7 cycles
909 // Extra latency cycles since wbck is 7 cycles
1280 // Extra latency cycles since wbck is 6 cycles
1289 // Extra latency cycles since wbck is 6 cycles
1298 // Extra latency cycles since wbck is 6 cycles
1307 // Extra latency cycles since wbck is 6 cycles
1316 // Extra latency cycles since wbck is 6 cycles
1325 // Extra latency cycles since wbck is 6 cycles
1334 // Extra latency cycles since wbck is 6 cycles
1343 // Extra latency cycles since wbck is 6 cycles
1352 // Extra latency cycles since wbck is 6 cycles
1361 // Extra latency cycles since wbck is 6 cycles
1370 // Extra latency cycles since wbck is 6 cycles
1379 // Extra latency cycles since wbck is 6 cycles
1388 // Extra latency cycles since wbck is 6 cycles
1397 // Extra latency cycles since wbck is 6 cycles
1406 // Extra latency cycles since wbck is 6 cycles
1415 // Extra latency cycles since wbck is 6 cycles
1425 // Extra latency cycles since wbck is 6 cycles
1436 // Extra latency cycles since wbck is 7 cycles
1445 // Extra latency cycles since wbck is 6 cycles
1454 // Extra latency cycles since wbck is 6 cycles
1463 // Extra latency cycles since wbck is 6 cycles
1472 // Extra latency cycles since wbck is 6 cycles
1482 // Extra latency cycles since wbck is 6 cycles
1491 // Extra latency cycles since wbck is 7 cycles
1501 // Extra latency cycles since wbck is 7 cycles
1510 // Extra latency cycles since wbck is 9 cycles
1519 // Extra latency cycles since wbck is 6 cycles
1528 // Extra latency cycles since wbck is 7 cycles
1537 // Extra latency cycles since wbck is 7 cycles
1546 // Extra latency cycles since wbck is 9 cycles
1564 // Extra latency cycles since wbck is 6 cycles
1573 // Extra latency cycles since wbck is 6 cycles
1582 // Extra latency cycles since wbck is 6 cycles
1632 // Extra latency cycles since wbck is 6 cycles
1641 // Extra latency cycles since wbck is 6 cycles
1652 // Extra latency cycles since wbck is 7 cycles
1663 // Extra latency cycles since wbck is 6 cycles
1673 // Extra latency cycles since wbck is 6 cycles
1682 // Extra latency cycles since wbck is 6 cycles
1695 // Extra latency cycles since wbck is 7 cycles
1704 // Extra latency cycles since wbck is 7 cycles
1713 // Extra latency cycles since wbck is 7 cycles
1724 // Extra latency cycles since wbck is 9 cycles
1733 // Extra latency cycles since wbck is 7 cycles
1744 // Extra latency cycles since wbck is 9 cycles
1753 // Extra latency cycles since wbck is 10 cycles
1762 // Extra latency cycles since wbck is 11 cycles
1771 // Extra latency cycles since wbck is 6 cycles
1782 // Extra latency cycles since wbck is 7 cycles
1793 // Extra latency cycles since wbck is 8 cycles
1803 // Extra latency cycles since wbck is 6 cycles
1812 // Extra latency cycles since wbck is 7 cycles
1821 // Extra latency cycles since wbck is 7 cycles
1828 // Extra latency cycles since wbck is 7 cycles
1835 // Extra latency cycles since wbck is 8 cycles
1842 // Extra latency cycles since wbck is 8 cycles
1851 // Extra latency cycles since wbck is 7 cycles
1858 // Extra latency cycles since wbck is 7 cycles
1865 // Extra latency cycles since wbck is 8 cycles
1872 // Extra latency cycles since wbck is 8 cycles
1891 let LoadLatency = 2; // Optimistic load latency assuming bypass.
1906 // The AGU unit has BufferSize=1 so that the latency between operations
1922 // Define scheduler read/write types with their resources and latency on A9.
1962 // NEON has an odd mix of latencies. Simply name the write types by latency.
2013 // Define helpers for extra latency without consuming resources.
2023 // latency for instructions that generate multiple loads or stores.
2035 // LDM/VLDM/VLDn address generation latency & resources.
2056 // the same latency.
2059 // Each A9WriteL#N variant adds N cycles of latency without consuming
2125 // A9WriteLfpOps with additive latency that takes a single issue slot.
2130 // A9WriteLfp1-8Mov adds a cycle of latency and FP resource for
2155 // A9WriteLMfpLo takes a LS and FP resource and one issue slot but no latency.
2160 // Each A9WriteL#N variant adds N cycles of latency without consuming
2166 // the same latency.
2233 // additive latency.
2247 // after the instruction issues, decreases producer latency by N-1.
2314 // latency is only relevant for users of an updated address.
2335 // is listed after all def operands, so has no effective latency.