Lines Matching refs:OpNo
203 getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValue() argument
207 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue()
225 getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTarget7OpValueMM() argument
229 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget7OpValueMM()
247 getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMMPC10() argument
251 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMMPC10()
269 getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMM() argument
273 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMM()
292 getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, in getBranchTarget21OpValue() argument
296 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget21OpValue()
314 getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo, in getBranchTarget26OpValue() argument
318 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget26OpValue()
336 getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo, in getJumpOffset16OpValue() argument
340 const MCOperand &MO = MI.getOperand(OpNo); in getJumpOffset16OpValue()
355 getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, in getJumpTargetOpValue() argument
359 const MCOperand &MO = MI.getOperand(OpNo); in getJumpTargetOpValue()
373 getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, in getJumpTargetOpValueMM() argument
377 const MCOperand &MO = MI.getOperand(OpNo); in getJumpTargetOpValueMM()
391 getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, in getUImm5Lsl2Encoding() argument
395 const MCOperand &MO = MI.getOperand(OpNo); in getUImm5Lsl2Encoding()
410 getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, in getSImm3Lsa2Value() argument
414 const MCOperand &MO = MI.getOperand(OpNo); in getSImm3Lsa2Value()
424 getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, in getUImm6Lsl2Encoding() argument
428 const MCOperand &MO = MI.getOperand(OpNo); in getUImm6Lsl2Encoding()
438 getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, in getSImm9AddiuspValue() argument
442 const MCOperand &MO = MI.getOperand(OpNo); in getSImm9AddiuspValue()
628 MipsMCCodeEmitter::getMSAMemEncoding(const MCInst &MI, unsigned OpNo, in getMSAMemEncoding() argument
632 assert(MI.getOperand(OpNo).isReg()); in getMSAMemEncoding()
633 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; in getMSAMemEncoding()
634 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMSAMemEncoding()
672 MipsMCCodeEmitter::getMemEncoding(const MCInst &MI, unsigned OpNo, in getMemEncoding() argument
676 assert(MI.getOperand(OpNo).isReg()); in getMemEncoding()
677 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; in getMemEncoding()
678 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
684 getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo, in getMemEncodingMMImm4() argument
688 assert(MI.getOperand(OpNo).isReg()); in getMemEncodingMMImm4()
689 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
691 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
698 getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo, in getMemEncodingMMImm4Lsl1() argument
702 assert(MI.getOperand(OpNo).isReg()); in getMemEncodingMMImm4Lsl1()
703 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
705 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
712 getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo, in getMemEncodingMMImm4Lsl2() argument
716 assert(MI.getOperand(OpNo).isReg()); in getMemEncodingMMImm4Lsl2()
717 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
719 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
726 getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo, in getMemEncodingMMSPImm5Lsl2() argument
730 assert(MI.getOperand(OpNo).isReg() && in getMemEncodingMMSPImm5Lsl2()
731 MI.getOperand(OpNo).getReg() == Mips::SP && in getMemEncodingMMSPImm5Lsl2()
733 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMSPImm5Lsl2()
740 getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo, in getMemEncodingMMGPImm7Lsl2() argument
744 assert(MI.getOperand(OpNo).isReg() && in getMemEncodingMMGPImm7Lsl2()
745 MI.getOperand(OpNo).getReg() == Mips::GP && in getMemEncodingMMGPImm7Lsl2()
748 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMGPImm7Lsl2()
755 getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo, in getMemEncodingMMImm12() argument
765 OpNo = MI.getNumOperands() - 2; in getMemEncodingMMImm12()
770 assert(MI.getOperand(OpNo).isReg()); in getMemEncodingMMImm12()
771 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) << 16; in getMemEncodingMMImm12()
772 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncodingMMImm12()
778 getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo, in getMemEncodingMMImm4sp() argument
788 OpNo = MI.getNumOperands() - 2; in getMemEncodingMMImm4sp()
793 assert(MI.getOperand(OpNo).isReg()); in getMemEncodingMMImm4sp()
795 assert(MI.getOperand(OpNo+1).isImm()); in getMemEncodingMMImm4sp()
796 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncodingMMImm4sp()
802 MipsMCCodeEmitter::getSizeExtEncoding(const MCInst &MI, unsigned OpNo, in getSizeExtEncoding() argument
805 assert(MI.getOperand(OpNo).isImm()); in getSizeExtEncoding()
806 unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getSizeExtEncoding()
813 MipsMCCodeEmitter::getSizeInsEncoding(const MCInst &MI, unsigned OpNo, in getSizeInsEncoding() argument
816 assert(MI.getOperand(OpNo-1).isImm()); in getSizeInsEncoding()
817 assert(MI.getOperand(OpNo).isImm()); in getSizeInsEncoding()
818 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups, STI); in getSizeInsEncoding()
819 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getSizeInsEncoding()
825 MipsMCCodeEmitter::getLSAImmEncoding(const MCInst &MI, unsigned OpNo, in getLSAImmEncoding() argument
828 assert(MI.getOperand(OpNo).isImm()); in getLSAImmEncoding()
830 return getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) - 1; in getLSAImmEncoding()
834 MipsMCCodeEmitter::getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo, in getSimm19Lsl2Encoding() argument
837 const MCOperand &MO = MI.getOperand(OpNo); in getSimm19Lsl2Encoding()
855 MipsMCCodeEmitter::getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo, in getSimm18Lsl3Encoding() argument
858 const MCOperand &MO = MI.getOperand(OpNo); in getSimm18Lsl3Encoding()
861 unsigned Res = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getSimm18Lsl3Encoding()
876 MipsMCCodeEmitter::getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo, in getUImm3Mod8Encoding() argument
879 assert(MI.getOperand(OpNo).isImm()); in getUImm3Mod8Encoding()
880 const MCOperand &MO = MI.getOperand(OpNo); in getUImm3Mod8Encoding()
885 MipsMCCodeEmitter::getUImm4AndValue(const MCInst &MI, unsigned OpNo, in getUImm4AndValue() argument
888 assert(MI.getOperand(OpNo).isImm()); in getUImm4AndValue()
889 const MCOperand &MO = MI.getOperand(OpNo); in getUImm4AndValue()
913 MipsMCCodeEmitter::getRegisterListOpValue(const MCInst &MI, unsigned OpNo, in getRegisterListOpValue() argument
921 for (unsigned I = OpNo, E = MI.getNumOperands() - 2; I < E; ++I) { in getRegisterListOpValue()
933 MipsMCCodeEmitter::getRegisterListOpValue16(const MCInst &MI, unsigned OpNo, in getRegisterListOpValue16() argument
940 MipsMCCodeEmitter::getRegisterPairOpValue(const MCInst &MI, unsigned OpNo, in getRegisterPairOpValue() argument
943 return getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getRegisterPairOpValue()
947 MipsMCCodeEmitter::getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo, in getMovePRegPairOpValue() argument
981 MipsMCCodeEmitter::getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo, in getSimm23Lsl2Encoding() argument
984 const MCOperand &MO = MI.getOperand(OpNo); in getSimm23Lsl2Encoding()