Lines Matching refs:MVT
113 unsigned fastEmit_i(MVT Ty, MVT RetTy, unsigned Opc, uint64_t Imm) override;
145 bool isTypeLegal(Type *Ty, MVT &VT);
146 bool isLoadTypeLegal(Type *Ty, MVT &VT);
152 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
155 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr);
157 void PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset,
159 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
161 unsigned PPCMaterializeFP(const ConstantFP *CFP, MVT VT);
162 unsigned PPCMaterializeGV(const GlobalValue *GV, MVT VT);
163 unsigned PPCMaterializeInt(const Constant *C, MVT VT, bool UseSExt = true);
168 unsigned PPCMoveToIntReg(const Instruction *I, MVT VT,
170 unsigned PPCMoveToFPReg(MVT VT, unsigned SrcReg, bool IsSigned);
176 SmallVectorImpl<MVT> &ArgVTs,
182 bool finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes);
260 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal()
264 if (Evt == MVT::Other || !Evt.isSimple()) return false; in isTypeLegal()
274 bool PPCFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) { in isLoadTypeLegal()
279 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { in isLoadTypeLegal()
401 void PPCFastISel::PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset, in PPCSimplifyAddress()
420 IntegerType *OffsetTy = ((VT == MVT::i32) ? Type::getInt32Ty(*Context) in PPCSimplifyAddress()
424 IndexReg = PPCMaterializeInt(Offset, MVT::i64); in PPCSimplifyAddress()
432 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad()
448 (VT == MVT::f64 ? &PPC::F8RCRegClass : in PPCEmitLoad()
449 (VT == MVT::f32 ? &PPC::F4RCRegClass : in PPCEmitLoad()
450 (VT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in PPCEmitLoad()
458 case MVT::i8: in PPCEmitLoad()
461 case MVT::i16: in PPCEmitLoad()
466 case MVT::i32: in PPCEmitLoad()
473 case MVT::i64: in PPCEmitLoad()
479 case MVT::f32: in PPCEmitLoad()
482 case MVT::f64: in PPCEmitLoad()
563 MVT VT; in SelectLoad()
587 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
598 case MVT::i8: in PPCEmitStore()
601 case MVT::i16: in PPCEmitStore()
604 case MVT::i32: in PPCEmitStore()
608 case MVT::i64: in PPCEmitStore()
612 case MVT::f32: in PPCEmitStore()
615 case MVT::f64: in PPCEmitStore()
705 MVT VT; in SelectStore()
783 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp()
785 if (SrcVT == MVT::i1 && PPCSubTarget->useCRBits()) in PPCEmitCmp()
798 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
799 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
811 case MVT::f32: in PPCEmitCmp()
814 case MVT::f64: in PPCEmitCmp()
817 case MVT::i1: in PPCEmitCmp()
818 case MVT::i8: in PPCEmitCmp()
819 case MVT::i16: in PPCEmitCmp()
822 case MVT::i32: in PPCEmitCmp()
828 case MVT::i64: in PPCEmitCmp()
849 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
855 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
877 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
895 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc()
918 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
922 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
924 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned)) in PPCMoveToFPReg()
935 if (!PPCEmitStore(MVT::i64, SrcReg, Addr)) in PPCMoveToFPReg()
942 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
954 if (!PPCEmitLoad(MVT::f64, ResultReg, Addr, RC, !IsSigned, LoadOpc)) in PPCMoveToFPReg()
964 MVT DstVT; in SelectIToFP()
969 if (DstVT != MVT::f32 && DstVT != MVT::f64) in SelectIToFP()
977 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP()
979 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && in SelectIToFP()
980 SrcVT != MVT::i32 && SrcVT != MVT::i64) in SelectIToFP()
997 if (DstVT == MVT::f32 && !PPCSubTarget->hasFPCVT()) in SelectIToFP()
1001 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { in SelectIToFP()
1003 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned)) in SelectIToFP()
1005 SrcVT = MVT::i64; in SelectIToFP()
1019 if (DstVT == MVT::f32) in SelectIToFP()
1037 unsigned PPCFastISel::PPCMoveToIntReg(const Instruction *I, MVT VT, in PPCMoveToIntReg()
1048 if (!PPCEmitStore(MVT::f64, SrcReg, Addr)) in PPCMoveToIntReg()
1053 if (VT == MVT::i32) in PPCMoveToIntReg()
1073 MVT DstVT, SrcVT; in SelectFPToI()
1078 if (DstVT != MVT::i32 && DstVT != MVT::i64) in SelectFPToI()
1082 if (DstVT == MVT::i64 && !IsSigned && !PPCSubTarget->hasFPCVT()) in SelectFPToI()
1090 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in SelectFPToI()
1114 if (DstVT == MVT::i32) in SelectFPToI()
1142 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp()
1244 SmallVectorImpl<MVT> &ArgVTs, in processCallArgs()
1262 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1266 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64 || ArgVT == MVT::i1 || in processCallArgs()
1301 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1310 MVT DestVT = VA.getLocVT(); in processCallArgs()
1312 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1322 MVT DestVT = VA.getLocVT(); in processCallArgs()
1324 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1341 if (ArgVT == MVT::f32 || ArgVT == MVT::f64) { in processCallArgs()
1358 bool PPCFastISel::finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes) { in finishCall()
1369 if (RetVT != MVT::isVoid) { in finishCall()
1377 MVT DestVT = VA.getValVT(); in finishCall()
1378 MVT CopyVT = DestVT; in finishCall()
1382 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1383 CopyVT = MVT::i64; in finishCall()
1397 } else if (CopyVT == MVT::f64) { in finishCall()
1406 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) { in finishCall()
1445 MVT RetVT; in fastLowerCall()
1447 RetVT = MVT::isVoid; in fastLowerCall()
1448 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall()
1449 RetVT != MVT::i8) in fastLowerCall()
1451 else if (RetVT == MVT::i1 && PPCSubTarget->useCRBits()) in fastLowerCall()
1456 if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && in fastLowerCall()
1457 RetVT != MVT::i32 && RetVT != MVT::i64 && RetVT != MVT::f32 && in fastLowerCall()
1458 RetVT != MVT::f64) { in fastLowerCall()
1475 SmallVector<MVT, 8> ArgVTs; in fastLowerCall()
1493 MVT ArgVT; in fastLowerCall()
1494 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
1600 unsigned SrcReg = PPCMaterializeInt(C, MVT::i64, in SelectRet()
1625 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet()
1626 MVT DestVT = VA.getLocVT(); in SelectRet()
1628 if (RVVT != DestVT && RVVT != MVT::i8 && in SelectRet()
1629 RVVT != MVT::i16 && RVVT != MVT::i32) in SelectRet()
1641 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1650 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1679 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in PPCEmitIntExt()
1681 if (DestVT != MVT::i32 && DestVT != MVT::i64) in PPCEmitIntExt()
1683 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1689 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1690 Opc = (DestVT == MVT::i32) ? PPC::EXTSB : PPC::EXTSB8_32_64; in PPCEmitIntExt()
1691 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1692 Opc = (DestVT == MVT::i32) ? PPC::EXTSH : PPC::EXTSH8_32_64; in PPCEmitIntExt()
1694 assert(DestVT == MVT::i64 && "Signed extend from i32 to i32??"); in PPCEmitIntExt()
1701 } else if (DestVT == MVT::i32) { in PPCEmitIntExt()
1703 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1706 assert(SrcVT == MVT::i16 && "Unsigned extend from i32 to i32??"); in PPCEmitIntExt()
1716 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1718 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1753 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
1756 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectTrunc()
1764 if (SrcVT == MVT::i64) { in SelectTrunc()
1794 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt()
1795 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt()
1804 (DestVT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in SelectIntExt()
1866 unsigned PPCFastISel::PPCMaterializeFP(const ConstantFP *CFP, MVT VT) { in PPCMaterializeFP()
1868 if (VT != MVT::f32 && VT != MVT::f64) in PPCMaterializeFP()
1881 (VT == MVT::f32) ? 4 : 8, Align); in PPCMaterializeFP()
1883 unsigned Opc = (VT == MVT::f32) ? PPC::LFS : PPC::LFD; in PPCMaterializeFP()
1918 unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) { in PPCMaterializeGV()
1919 assert(VT == MVT::i64 && "Non-address!"); in PPCMaterializeGV()
2065 unsigned PPCFastISel::PPCMaterializeInt(const Constant *C, MVT VT, in PPCMaterializeInt()
2069 if (VT == MVT::i1 && PPCSubTarget->useCRBits()) { in PPCMaterializeInt()
2077 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in PPCMaterializeInt()
2078 VT != MVT::i8 && VT != MVT::i1) in PPCMaterializeInt()
2081 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in PPCMaterializeInt()
2087 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt()
2097 if (VT == MVT::i64) in PPCMaterializeInt()
2099 else if (VT == MVT::i32) in PPCMaterializeInt()
2112 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
2119 return PPCMaterializeInt(C, VT, VT != MVT::i1); in fastMaterializeConstant()
2130 MVT VT; in fastMaterializeAlloca()
2157 MVT VT; in tryToFoldLoadIntoMI()
2171 if ((VT == MVT::i8 && MB <= 56) || in tryToFoldLoadIntoMI()
2172 (VT == MVT::i16 && MB <= 48) || in tryToFoldLoadIntoMI()
2173 (VT == MVT::i32 && MB <= 32)) in tryToFoldLoadIntoMI()
2182 if ((VT == MVT::i8 && MB <= 24) || in tryToFoldLoadIntoMI()
2183 (VT == MVT::i16 && MB <= 16)) in tryToFoldLoadIntoMI()
2197 if (VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2204 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2236 unsigned PPCFastISel::fastEmit_i(MVT Ty, MVT VT, unsigned Opc, uint64_t Imm) { in fastEmit_i()
2243 if (VT == MVT::i1 && PPCSubTarget->useCRBits()) { in fastEmit_i()
2250 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in fastEmit_i()
2251 VT != MVT::i8 && VT != MVT::i1) in fastEmit_i()
2254 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in fastEmit_i()
2256 if (VT == MVT::i64) in fastEmit_i()