Lines Matching refs:REG_SEQUENCE

1378   case AMDGPU::REG_SEQUENCE: return AMDGPU::REG_SEQUENCE;  in getVALUOp()
1456   case AMDGPU::REG_SEQUENCE:  in canReadVGPR()
1560   BuildMI(*MBB, MI, DL, get(TargetOpcode::REG_SEQUENCE), Dst)  in split64BitImm()
1706   if (MI->getOpcode() == AMDGPU::REG_SEQUENCE ||  in legalizeOperands()
1743       if (MI->getOpcode() == AMDGPU::REG_SEQUENCE) {  in legalizeOperands()
1825     BuildMI(MBB, MI, MI->getDebugLoc(), get(AMDGPU::REG_SEQUENCE),  in legalizeOperands()
1891     BuildMI(MBB, MI, MI->getDebugLoc(), get(AMDGPU::REG_SEQUENCE),  in legalizeOperands()
1992   BuildMI(*MBB, MI, DL, get(AMDGPU::REG_SEQUENCE))  in splitSMRD()
2051       BuildMI(*MBB, MI, MI->getDebugLoc(), get(AMDGPU::REG_SEQUENCE), SRsrc)  in moveSMRDToVALU()
2281     case AMDGPU::REG_SEQUENCE:  in moveToVALU()
2362   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitUnaryOp()
2426   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitBinaryOp()
2514     BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg)  in splitScalar64BitBFE()
2532   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg)  in splitScalar64BitBFE()