Lines Matching refs:Num
84 unsigned Num; member
142 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createReg() argument
145 Op->Reg.Num = Num; in createReg()
149 createAccessReg(unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createAccessReg() argument
151 Op->AccessReg = Num; in createAccessReg()
199 return Reg.Num; in getReg()
336 unsigned Num; member
474 if (Name.substr(1).getAsInteger(10, Reg.Num)) in parseRegister()
478 if (Prefix == 'r' && Reg.Num < 16) in parseRegister()
480 else if (Prefix == 'f' && Reg.Num < 16) in parseRegister()
482 else if (Prefix == 'a' && Reg.Num < 16) in parseRegister()
502 if (Regs && Regs[Reg.Num] == 0) in parseRegister()
504 if (Reg.Num == 0 && IsAddress) in parseRegister()
507 Reg.Num = Regs[Reg.Num]; in parseRegister()
523 Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num, in parseRegister()
552 Index = Reg.Num; in parseAddress()
554 Base = Reg.Num; in parseAddress()
567 Base = Reg.Num; in parseAddress()
625 RegNo = SystemZMC::GR64Regs[Reg.Num]; in ParseRegister()
627 RegNo = SystemZMC::FP64Regs[Reg.Num]; in ParseRegister()
774 Operands.push_back(SystemZOperand::createAccessReg(Reg.Num, in parseAccessReg()