Lines Matching refs:ldp
6 ; CHECK: ldp
28 ; CHECK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0]
41 ; CHECK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0]
55 ; CHECK: ldp
65 ; CHECK: ldp
75 ; CHECK: ldp
84 ; Test the load/store optimizer---combine ldurs into a ldp, if appropriate
87 ; LDUR_CHK: ldp [[DST1:w[0-9]+]], [[DST2:w[0-9]+]], [x0, #-8]
115 ; LDUR_CHK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0, #-8]
131 ; LDUR_CHK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0, #-8]
148 ; LDUR_CHK: ldp [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-16]
161 ; LDUR_CHK: ldp [[DST1:s[0-9]+]], [[DST2:s[0-9]+]], [x0, #-8]
174 ; LDUR_CHK: ldp [[DST1:d[0-9]+]], [[DST2:d[0-9]+]], [x0, #-16]
189 ; LDUR_CHK: ldp [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-256]
219 ; LDUR_CHK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0, #-256]
236 ; LDUR_CHK: ldp w[[DST1:[0-9]+]], w[[DST2:[0-9]+]], [x0, #-256]
252 ; LDUR_CHK-NOT: ldp
254 ; are used---just check that there isn't an ldp before the add
267 ; LDUR_CHK-NOT: ldp
269 ; are used---just check that there isn't an ldp before the add
284 ; LDUR_CHK-NOT: ldp
307 ; LDUR_CHK-NOT: ldp