Lines Matching refs:shl
7 …%shl = shl <16 x i16> %InVec, <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 …
8 ret <16 x i16> %shl
17 …%shl = shl <16 x i16> %InVec, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 …
18 ret <16 x i16> %shl
27 …%shl = shl <16 x i16> %InVec, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16…
28 ret <16 x i16> %shl
37 %shl = shl <8 x i32> %InVec, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
38 ret <8 x i32> %shl
47 %shl = shl <8 x i32> %InVec, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
48 ret <8 x i32> %shl
57 …%tmp = shl <8 x i32> <i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199>, %amt
67 %shl = shl <8 x i32> %InVec, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
68 ret <8 x i32> %shl
77 %shl = shl <4 x i64> %InVec, <i64 0, i64 0, i64 0, i64 0>
78 ret <4 x i64> %shl
87 %shl = shl <4 x i64> %InVec, <i64 1, i64 1, i64 1, i64 1>
88 ret <4 x i64> %shl
97 %shl = shl <4 x i64> %InVec, <i64 63, i64 63, i64 63, i64 63>
98 ret <4 x i64> %shl
109 …%shl = ashr <16 x i16> %InVec, <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16…
110 ret <16 x i16> %shl
119 …%shl = ashr <16 x i16> %InVec, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16…
120 ret <16 x i16> %shl
129 …%shl = ashr <16 x i16> %InVec, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i1…
130 ret <16 x i16> %shl
139 %shl = ashr <8 x i32> %InVec, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
140 ret <8 x i32> %shl
149 %shl = ashr <8 x i32> %InVec, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
150 ret <8 x i32> %shl
159 %shl = ashr <8 x i32> %InVec, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
160 ret <8 x i32> %shl
171 …%shl = lshr <16 x i16> %InVec, <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16…
172 ret <16 x i16> %shl
181 …%shl = lshr <16 x i16> %InVec, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16…
182 ret <16 x i16> %shl
191 …%shl = lshr <16 x i16> %InVec, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i1…
192 ret <16 x i16> %shl
201 %shl = lshr <8 x i32> %InVec, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
202 ret <8 x i32> %shl
211 %shl = lshr <8 x i32> %InVec, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
212 ret <8 x i32> %shl
221 %shl = lshr <8 x i32> %InVec, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
222 ret <8 x i32> %shl
231 %shl = lshr <4 x i64> %InVec, <i64 0, i64 0, i64 0, i64 0>
232 ret <4 x i64> %shl
241 %shl = lshr <4 x i64> %InVec, <i64 1, i64 1, i64 1, i64 1>
242 ret <4 x i64> %shl
251 %shl = lshr <4 x i64> %InVec, <i64 63, i64 63, i64 63, i64 63>
252 ret <4 x i64> %shl