| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 237 const MCInstrDesc &MCID) { in BuildMI()
246 const MCInstrDesc &MCID, in BuildMI()
259 const MCInstrDesc &MCID, in BuildMI()
270 const MCInstrDesc &MCID, in BuildMI()
281 const MCInstrDesc &MCID, in BuildMI()
299 const MCInstrDesc &MCID) { in BuildMI()
309 const MCInstrDesc &MCID) { in BuildMI()
319 const MCInstrDesc &MCID) { in BuildMI()
335 const MCInstrDesc &MCID) { in BuildMI()
345 const MCInstrDesc &MCID, in BuildMI()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst()
149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
282 const MCInstrDesc &MCID = DAG.TII->get(Opcode); in GetInstrType() local
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| D | PPCRegisterInfo.cpp | 984 const MCInstrDesc &MCID = TII.get(ADDriOpc); in materializeFrameBaseRegister() local
1010 const MCInstrDesc &MCID = MI.getDesc(); in resolveFrameIndex() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local
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| D | Thumb2SizeReduction.cpp | 214 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef()
549 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() local
698 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local
762 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow() local
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| D | MLxExpansionPass.cpp | 187 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
344 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions() local
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| D | Thumb2ITBlockPass.cpp | 142 const MCInstrDesc &MCID = MI->getDesc(); in MoveCopyOutOfITBlock() local
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| D | ARMBaseInstrInfo.cpp | 157 const MCInstrDesc &MCID = MI->getDesc(); in convertToThreeAddress() local
605 const MCInstrDesc &MCID = MI->getDesc(); in GetInstSizeInBytes() local
3926 const MCInstrDesc &MCID = MI->getDesc(); in getPredicationCost() local
3956 const MCInstrDesc &MCID = MI->getDesc(); in getInstrLatency() local
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| /external/llvm/lib/CodeGen/ |
| D | ScoreboardHazardRecognizer.cpp | 129 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
185 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
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| D | TargetInstrInfo.cpp | 43 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, in getRegClass()
124 const MCInstrDesc &MCID = MI->getDesc(); in commuteInstruction() local
187 const MCInstrDesc &MCID = MI->getDesc(); in findCommutedOpIndices() local
222 const MCInstrDesc &MCID = MI->getDesc(); in PredicateInstruction() local
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| D | PeepholeOptimizer.cpp | 996 const MCInstrDesc &MCID = MI->getDesc(); in isLoadFoldable() local
1016 const MCInstrDesc &MCID = MI->getDesc(); in isMoveImmediate() local
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| D | MachineVerifier.cpp | 770 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineInstrBefore() local
814 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineOperand() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrBuilder.h | 31 const MCInstrDesc &MCID = MI->getDesc(); in addFrameReference() local
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| D | SystemZInstrInfo.cpp | 195 const MCInstrDesc &MCID = MI->getDesc(); in isSimpleMove() local
624 const MCInstrDesc &MCID = MI->getDesc(); in isSimpleBD12Move() local
1125 const MCInstrDesc &MCID = get(Opcode); in getOpcodeForOffset() local
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| /external/skia/experimental/PdfViewer/pdfparser/native/pdfapi/ |
| D | SkPdfMarkedContentReferenceDictionary_autogen.cpp | 59 int64_t SkPdfMarkedContentReferenceDictionary::MCID(SkPdfNativeDoc* doc) { in MCID() function in SkPdfMarkedContentReferenceDictionary
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionalCompares.cpp | 593 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
650 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
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| D | AArch64RegisterInfo.cpp | 341 const MCInstrDesc &MCID = TII->get(AArch64::ADDXri); in materializeFrameBaseRegister() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 258 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in CopyAndMoveSuccessors() local
441 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in getPhysicalRegisterVT() local
520 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode()); in DelayForLiveRegsBottomUp() local
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| D | ScheduleDAGSDNodes.cpp | 299 const MCInstrDesc &MCID = TII->get(Opc); in ClusterNodes() local
434 const MCInstrDesc &MCID = TII->get(Opc); in AddSchedEdges() local
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| D | InstrEmitter.cpp | 324 const MCInstrDesc &MCID = MIB->getDesc(); in AddRegisterOperand() local
854 const MCInstrDesc &MCID = TII->get(F->getMachineOpcode()); in EmitMachineNode() local
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| D | ScheduleDAGRRList.cpp | 1003 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in CopyAndMoveSuccessors() local
1198 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in getPhysicalRegisterVT() local
1326 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode()); in DelayForLiveRegsBottomUp() local
2692 const MCInstrDesc &MCID = TII->get(Opc); in canClobber() local
2919 const MCInstrDesc &MCID = TII->get(Opc); in AddPseudoTwoAddrDeps() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 153 const MCInstrDesc &MCID = MI->getDesc(); variable
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 102 const MCInstrDesc &MCID = get(Opc); in BuildCondBr() local
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| /external/pdfium/core/include/fpdfapi/ |
| D | fpdf_pageobj.h | 345 MCID enumerator
|