/external/llvm/lib/Target/R600/ |
D | SIFixSGPRCopies.cpp | 118 static bool hasVGPROperands(const MachineInstr &MI, const SIRegisterInfo *TRI) { in hasVGPROperands() 135 const SIRegisterInfo *TRI, in inferRegClassFromUses() 161 const SIRegisterInfo *TRI, in inferRegClassFromDef() 179 const SIRegisterInfo *TRI, in isVGPRToSGPRCopy() 204 const SIRegisterInfo *TRI = in runOnMachineFunction() local
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D | SIShrinkInstructions.cpp | 75 static bool isVGPR(const MachineOperand *MO, const SIRegisterInfo &TRI, in isVGPR() 87 const SIRegisterInfo &TRI, in canShrink() 135 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in foldImmediates() local 182 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
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D | R600ExpandSpecialInstrs.cpp | 71 const R600RegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local 179 const R600RegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local 200 const R600RegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
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D | SIFoldOperands.cpp | 107 const TargetRegisterInfo &TRI) { in updateOperand() 162 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
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D | SIMachineFunctionInfo.cpp | 42 const SIRegisterInfo *TRI = static_cast<const SIRegisterInfo *>( in getSpilledReg() local
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/external/llvm/include/llvm/CodeGen/ |
D | LivePhysRegs.h | 44 const TargetRegisterInfo *TRI; variable 54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { in LivePhysRegs() 60 void init(const TargetRegisterInfo *TRI) { in init()
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/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfExpression.h | 38 DwarfExpression(const TargetRegisterInfo &TRI, in DwarfExpression() 110 DebugLocDwarfExpression(const TargetRegisterInfo &TRI, in DebugLocDwarfExpression()
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D | DbgValueHistoryCalculator.cpp | 135 const TargetRegisterInfo *TRI, in applyToClobberedRegisters() 170 const TargetRegisterInfo *TRI, in collectChangingRegs() 185 const TargetRegisterInfo *TRI, in calculateDbgValueHistory()
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/external/eigen/test/ |
D | product_trsolve.cpp | 12 #define VERIFY_TRSM(TRI,XB) { \ argument 21 #define VERIFY_TRSM_ONTHERIGHT(TRI,XB) { \ argument
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D | product_mmtr.cpp | 12 #define CHECK_MMTR(DEST, TRI, OP) { \ argument
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.h | 94 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot() 102 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
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D | MipsOptionRecord.h | 45 const MCRegisterInfo *TRI = Context.getRegisterInfo(); in MipsRegInfoRecord() local
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D | MipsFrameLowering.cpp | 103 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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/external/llvm/include/llvm/Target/ |
D | TargetFrameLowering.h | 104 const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots() 156 const TargetRegisterInfo *TRI) const { in spillCalleeSavedRegisters() 167 const TargetRegisterInfo *TRI) const { in restoreCalleeSavedRegisters()
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D | TargetInstrInfo.h | 641 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot() 654 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot() 844 const TargetRegisterInfo *TRI) const { in getLdStBaseRegImmOfs() 1169 const TargetRegisterInfo *TRI) const { in getPartialRegUpdateClearance() 1189 const TargetRegisterInfo *TRI) const { in getUndefRegClearance() 1213 const TargetRegisterInfo *TRI) const {} in breakPartialRegDependency()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.h | 26 const TargetRegisterInfo *TRI; variable
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/external/llvm/lib/CodeGen/ |
D | InterferenceCache.cpp | 83 const TargetRegisterInfo *TRI) { in revalidate() 95 const TargetRegisterInfo *TRI, in reset() 113 const TargetRegisterInfo *TRI) { in valid()
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D | StackMaps.cpp | 78 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) { in getDwarfRegNum() 91 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo(); in parseOperand() local 158 const TargetRegisterInfo *TRI = in print() local 240 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo(); in parseRegisterLiveOutMask() local
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D | AllocationOrder.cpp | 35 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); in AllocationOrder() local
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D | LocalStackSlotAllocation.cpp | 106 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in INITIALIZE_PASS_DEPENDENCY() local 260 const TargetRegisterInfo *TRI) { in lookupCandidateBaseReg() 277 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo(); in insertFrameReferenceRegisters() local
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D | CriticalAntiDepBreaker.h | 38 const TargetRegisterInfo *TRI; variable
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D | RegAllocPBQP.cpp | 365 const TargetRegisterInfo &TRI = in createInterferenceEdge() local 544 static bool isACalleeSavedRegister(unsigned reg, const TargetRegisterInfo &TRI, in isACalleeSavedRegister() 559 const TargetRegisterInfo &TRI = in initializeGraph() local 636 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in spillVReg() local 660 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in mapPBQPToRegAlloc() local 819 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in print() local
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/external/llvm/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 160 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in printOperand() local 253 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand() local 285 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand() local 341 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand() local 367 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand() local 382 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in PrintAsmOperand() local
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D | Thumb2ITBlockPass.cpp | 34 const TargetRegisterInfo *TRI; member in __anon093bee280111::Thumb2ITBlockPass 59 const TargetRegisterInfo *TRI) { in TrackDefUses()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.h | 33 const TargetRegisterInfo *TRI; variable
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