| /external/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createEmptyIntervalFrom() local
44 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createFrom() local
387 LiveRangeEdit::MRI_NoteNewVirtualRegister(unsigned VReg) in MRI_NoteNewVirtualRegister()
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| D | RegAllocPBQP.cpp | 297 unsigned VReg = G.getNodeMetadata(NId).getVReg(); in apply() local
565 unsigned VReg = Worklist.back(); in initializeGraph() local
627 void RegAllocPBQP::spillVReg(unsigned VReg, in spillVReg()
672 unsigned VReg = G.getNodeMetadata(NId).getVReg(); in mapPBQPToRegAlloc() local
820 unsigned VReg = G.getNodeMetadata(NId).getVReg(); in print() local
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| D | LiveIntervalUnion.cpp | 150 LiveInterval *VReg = LiveUnionI.value(); in collectInterferingVRegs() local
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| D | CallingConvLower.cpp | 245 unsigned VReg = MF.addLiveIn(PReg, RC); in analyzeMustTailForwardedRegisters() local
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| D | MachineFunction.cpp | 438 unsigned VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn() local
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| D | TailDuplication.cpp | 246 unsigned VReg = SSAUpdateVRs[i]; in TailDuplicateAndUpdate() local
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| D | InlineSpiller.cpp | 1047 unsigned VReg =0) { in dumpMachineInstrRangeWithSlotIndex()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegAllocPBQP.h | 154 void setNodeIdForVReg(unsigned VReg, GraphBase::NodeId NId) { in setNodeIdForVReg()
158 GraphBase::NodeId getNodeIdForVReg(unsigned VReg) const { in getNodeIdForVReg()
165 void eraseNodeIdForVReg(unsigned VReg) { in eraseNodeIdForVReg()
260 void setVReg(unsigned VReg) { this->VReg = VReg; } in setVReg()
320 unsigned VReg; variable
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| D | LiveIntervalUnion.h | 125 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): in Query()
141 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { in init()
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| D | MachineRegisterInfo.h | 190 bool shouldTrackSubRegLiveness(unsigned VReg) const { in shouldTrackSubRegLiveness()
623 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint()
632 getRegAllocationHint(unsigned VReg) const { in getRegAllocationHint()
639 unsigned getSimpleHint(unsigned VReg) const { in getSimpleHint()
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| D | CallingConvLower.h | 167 unsigned VReg; member
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 288 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); in getVR() local
321 unsigned VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
440 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx, in ConstrainForSubReg()
493 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitSubregNode() local
586 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitCopyToRegClassNode() local
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| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| D | NVPTXInstPrinter.cpp | 66 unsigned VReg = RegNo & 0x0FFFFFFF; in printRegName() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2785 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); in LowerFormalArguments_32SVR4() local
2804 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); in LowerFormalArguments_32SVR4() local
2995 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
3031 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
3057 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
3081 unsigned VReg; in LowerFormalArguments_64SVR4() local
3099 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
3138 unsigned VReg = (ObjectVT == MVT::v2f64 || ObjectVT == MVT::v2i64) ? in LowerFormalArguments_64SVR4() local
3171 unsigned VReg = MF.addLiveIn(QFPR[QFPR_idx], RC); in LowerFormalArguments_64SVR4() local
3227 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 294 static unsigned removeCopies(const MachineRegisterInfo &MRI, unsigned VReg) { in removeCopies()
307 static unsigned canFoldIntoCSel(const MachineRegisterInfo &MRI, unsigned VReg, in canFoldIntoCSel()
2925 unsigned VReg = MI->getOperand(0).getReg(); in optimizeCondBranch() local
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 221 unsigned VReg = RegInfo.createVirtualRegister(&BPF::GPRRegClass); in LowerFormalArguments() local
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| /external/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 508 unsigned VReg = 0; in eliminateFrameIndex() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 404 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments_32() local
516 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments_32() local
566 unsigned VReg = MF.addLiveIn(VA.getLocReg(), in LowerFormalArguments_64() local
637 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); in LowerFormalArguments_64() local
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| /external/llvm/lib/Target/R600/ |
| D | SIISelLowering.cpp | 1952 unsigned VReg = MI->getOperand(0).getReg(); in AdjustInstrPostInstrSelection() local
2085 SDValue VReg = AMDGPUTargetLowering::CreateLiveInRegister(DAG, RC, Reg, VT); in CreateLiveInRegister() local
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1337 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments() local
1389 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 885 unsigned VReg = in LowerFormalArguments() local
890 unsigned VReg = in LowerFormalArguments() local
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 468 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass); in LowerCCCArguments() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1429 unsigned VReg = getRegForValue(V); in getRegEnsuringSimpleIntegerWidening() local
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| D | MipsISelLowering.cpp | 874 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); in addLiveIn() local
3603 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 740 unsigned VReg = MRI.createVirtualRegister(RC); in LowerFormalArguments() local
791 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I], in LowerFormalArguments() local
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