1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #undef NDEBUG
29
30 #include "main/glheader.h"
31 #include "main/bufferobj.h"
32 #include "main/context.h"
33 #include "main/enums.h"
34 #include "main/macros.h"
35
36 #include "brw_draw.h"
37 #include "brw_defines.h"
38 #include "brw_context.h"
39 #include "brw_state.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_buffer_objects.h"
43
44 static GLuint double_types[5] = {
45 0,
46 BRW_SURFACEFORMAT_R64_FLOAT,
47 BRW_SURFACEFORMAT_R64G64_FLOAT,
48 BRW_SURFACEFORMAT_R64G64B64_FLOAT,
49 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
50 };
51
52 static GLuint float_types[5] = {
53 0,
54 BRW_SURFACEFORMAT_R32_FLOAT,
55 BRW_SURFACEFORMAT_R32G32_FLOAT,
56 BRW_SURFACEFORMAT_R32G32B32_FLOAT,
57 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
58 };
59
60 static GLuint half_float_types[5] = {
61 0,
62 BRW_SURFACEFORMAT_R16_FLOAT,
63 BRW_SURFACEFORMAT_R16G16_FLOAT,
64 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
65 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
66 };
67
68 static GLuint uint_types_direct[5] = {
69 0,
70 BRW_SURFACEFORMAT_R32_UINT,
71 BRW_SURFACEFORMAT_R32G32_UINT,
72 BRW_SURFACEFORMAT_R32G32B32_UINT,
73 BRW_SURFACEFORMAT_R32G32B32A32_UINT
74 };
75
76 static GLuint uint_types_norm[5] = {
77 0,
78 BRW_SURFACEFORMAT_R32_UNORM,
79 BRW_SURFACEFORMAT_R32G32_UNORM,
80 BRW_SURFACEFORMAT_R32G32B32_UNORM,
81 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
82 };
83
84 static GLuint uint_types_scale[5] = {
85 0,
86 BRW_SURFACEFORMAT_R32_USCALED,
87 BRW_SURFACEFORMAT_R32G32_USCALED,
88 BRW_SURFACEFORMAT_R32G32B32_USCALED,
89 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
90 };
91
92 static GLuint int_types_direct[5] = {
93 0,
94 BRW_SURFACEFORMAT_R32_SINT,
95 BRW_SURFACEFORMAT_R32G32_SINT,
96 BRW_SURFACEFORMAT_R32G32B32_SINT,
97 BRW_SURFACEFORMAT_R32G32B32A32_SINT
98 };
99
100 static GLuint int_types_norm[5] = {
101 0,
102 BRW_SURFACEFORMAT_R32_SNORM,
103 BRW_SURFACEFORMAT_R32G32_SNORM,
104 BRW_SURFACEFORMAT_R32G32B32_SNORM,
105 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
106 };
107
108 static GLuint int_types_scale[5] = {
109 0,
110 BRW_SURFACEFORMAT_R32_SSCALED,
111 BRW_SURFACEFORMAT_R32G32_SSCALED,
112 BRW_SURFACEFORMAT_R32G32B32_SSCALED,
113 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
114 };
115
116 static GLuint ushort_types_direct[5] = {
117 0,
118 BRW_SURFACEFORMAT_R16_UINT,
119 BRW_SURFACEFORMAT_R16G16_UINT,
120 BRW_SURFACEFORMAT_R16G16B16A16_UINT,
121 BRW_SURFACEFORMAT_R16G16B16A16_UINT
122 };
123
124 static GLuint ushort_types_norm[5] = {
125 0,
126 BRW_SURFACEFORMAT_R16_UNORM,
127 BRW_SURFACEFORMAT_R16G16_UNORM,
128 BRW_SURFACEFORMAT_R16G16B16_UNORM,
129 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
130 };
131
132 static GLuint ushort_types_scale[5] = {
133 0,
134 BRW_SURFACEFORMAT_R16_USCALED,
135 BRW_SURFACEFORMAT_R16G16_USCALED,
136 BRW_SURFACEFORMAT_R16G16B16_USCALED,
137 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
138 };
139
140 static GLuint short_types_direct[5] = {
141 0,
142 BRW_SURFACEFORMAT_R16_SINT,
143 BRW_SURFACEFORMAT_R16G16_SINT,
144 BRW_SURFACEFORMAT_R16G16B16A16_SINT,
145 BRW_SURFACEFORMAT_R16G16B16A16_SINT
146 };
147
148 static GLuint short_types_norm[5] = {
149 0,
150 BRW_SURFACEFORMAT_R16_SNORM,
151 BRW_SURFACEFORMAT_R16G16_SNORM,
152 BRW_SURFACEFORMAT_R16G16B16_SNORM,
153 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
154 };
155
156 static GLuint short_types_scale[5] = {
157 0,
158 BRW_SURFACEFORMAT_R16_SSCALED,
159 BRW_SURFACEFORMAT_R16G16_SSCALED,
160 BRW_SURFACEFORMAT_R16G16B16_SSCALED,
161 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
162 };
163
164 static GLuint ubyte_types_direct[5] = {
165 0,
166 BRW_SURFACEFORMAT_R8_UINT,
167 BRW_SURFACEFORMAT_R8G8_UINT,
168 BRW_SURFACEFORMAT_R8G8B8A8_UINT,
169 BRW_SURFACEFORMAT_R8G8B8A8_UINT
170 };
171
172 static GLuint ubyte_types_norm[5] = {
173 0,
174 BRW_SURFACEFORMAT_R8_UNORM,
175 BRW_SURFACEFORMAT_R8G8_UNORM,
176 BRW_SURFACEFORMAT_R8G8B8_UNORM,
177 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
178 };
179
180 static GLuint ubyte_types_scale[5] = {
181 0,
182 BRW_SURFACEFORMAT_R8_USCALED,
183 BRW_SURFACEFORMAT_R8G8_USCALED,
184 BRW_SURFACEFORMAT_R8G8B8_USCALED,
185 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
186 };
187
188 static GLuint byte_types_direct[5] = {
189 0,
190 BRW_SURFACEFORMAT_R8_SINT,
191 BRW_SURFACEFORMAT_R8G8_SINT,
192 BRW_SURFACEFORMAT_R8G8B8A8_SINT,
193 BRW_SURFACEFORMAT_R8G8B8A8_SINT
194 };
195
196 static GLuint byte_types_norm[5] = {
197 0,
198 BRW_SURFACEFORMAT_R8_SNORM,
199 BRW_SURFACEFORMAT_R8G8_SNORM,
200 BRW_SURFACEFORMAT_R8G8B8_SNORM,
201 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
202 };
203
204 static GLuint byte_types_scale[5] = {
205 0,
206 BRW_SURFACEFORMAT_R8_SSCALED,
207 BRW_SURFACEFORMAT_R8G8_SSCALED,
208 BRW_SURFACEFORMAT_R8G8B8_SSCALED,
209 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
210 };
211
212
213 /**
214 * Given vertex array type/size/format/normalized info, return
215 * the appopriate hardware surface type.
216 * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
217 */
get_surface_type(GLenum type,GLuint size,GLenum format,bool normalized,bool integer)218 static GLuint get_surface_type( GLenum type, GLuint size,
219 GLenum format, bool normalized, bool integer )
220 {
221 if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
222 printf("type %s size %d normalized %d\n",
223 _mesa_lookup_enum_by_nr(type), size, normalized);
224
225 if (integer) {
226 assert(format == GL_RGBA); /* sanity check */
227 switch (type) {
228 case GL_INT: return int_types_direct[size];
229 case GL_SHORT: return short_types_direct[size];
230 case GL_BYTE: return byte_types_direct[size];
231 case GL_UNSIGNED_INT: return uint_types_direct[size];
232 case GL_UNSIGNED_SHORT: return ushort_types_direct[size];
233 case GL_UNSIGNED_BYTE: return ubyte_types_direct[size];
234 default: assert(0); return 0;
235 }
236 } else if (normalized) {
237 switch (type) {
238 case GL_DOUBLE: return double_types[size];
239 case GL_FLOAT: return float_types[size];
240 case GL_HALF_FLOAT: return half_float_types[size];
241 case GL_INT: return int_types_norm[size];
242 case GL_SHORT: return short_types_norm[size];
243 case GL_BYTE: return byte_types_norm[size];
244 case GL_UNSIGNED_INT: return uint_types_norm[size];
245 case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
246 case GL_UNSIGNED_BYTE:
247 if (format == GL_BGRA) {
248 /* See GL_EXT_vertex_array_bgra */
249 assert(size == 4);
250 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
251 }
252 else {
253 return ubyte_types_norm[size];
254 }
255 default: assert(0); return 0;
256 }
257 }
258 else {
259 assert(format == GL_RGBA); /* sanity check */
260 switch (type) {
261 case GL_DOUBLE: return double_types[size];
262 case GL_FLOAT: return float_types[size];
263 case GL_HALF_FLOAT: return half_float_types[size];
264 case GL_INT: return int_types_scale[size];
265 case GL_SHORT: return short_types_scale[size];
266 case GL_BYTE: return byte_types_scale[size];
267 case GL_UNSIGNED_INT: return uint_types_scale[size];
268 case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
269 case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
270 /* This produces GL_FIXED inputs as values between INT32_MIN and
271 * INT32_MAX, which will be scaled down by 1/65536 by the VS.
272 */
273 case GL_FIXED: return int_types_scale[size];
274 default: assert(0); return 0;
275 }
276 }
277 }
278
279
get_size(GLenum type)280 static GLuint get_size( GLenum type )
281 {
282 switch (type) {
283 case GL_DOUBLE: return sizeof(GLdouble);
284 case GL_FLOAT: return sizeof(GLfloat);
285 case GL_HALF_FLOAT: return sizeof(GLhalfARB);
286 case GL_INT: return sizeof(GLint);
287 case GL_SHORT: return sizeof(GLshort);
288 case GL_BYTE: return sizeof(GLbyte);
289 case GL_UNSIGNED_INT: return sizeof(GLuint);
290 case GL_UNSIGNED_SHORT: return sizeof(GLushort);
291 case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
292 case GL_FIXED: return sizeof(GLuint);
293 default: assert(0); return 0;
294 }
295 }
296
get_index_type(GLenum type)297 static GLuint get_index_type(GLenum type)
298 {
299 switch (type) {
300 case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE;
301 case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
302 case GL_UNSIGNED_INT: return BRW_INDEX_DWORD;
303 default: assert(0); return 0;
304 }
305 }
306
307 static void
copy_array_to_vbo_array(struct brw_context * brw,struct brw_vertex_element * element,int min,int max,struct brw_vertex_buffer * buffer,GLuint dst_stride)308 copy_array_to_vbo_array(struct brw_context *brw,
309 struct brw_vertex_element *element,
310 int min, int max,
311 struct brw_vertex_buffer *buffer,
312 GLuint dst_stride)
313 {
314 if (min == -1) {
315 /* If we don't have computed min/max bounds, then this must be a use of
316 * the current attribute, which has a 0 stride. Otherwise, we wouldn't
317 * know what data to upload.
318 */
319 assert(element->glarray->StrideB == 0);
320
321 intel_upload_data(&brw->intel, element->glarray->Ptr,
322 element->element_size,
323 element->element_size,
324 &buffer->bo, &buffer->offset);
325
326 buffer->stride = 0;
327 return;
328 }
329
330 int src_stride = element->glarray->StrideB;
331 const unsigned char *src = element->glarray->Ptr + min * src_stride;
332 int count = max - min + 1;
333 GLuint size = count * dst_stride;
334
335 if (dst_stride == src_stride) {
336 intel_upload_data(&brw->intel, src, size, dst_stride,
337 &buffer->bo, &buffer->offset);
338 } else {
339 char * const map = intel_upload_map(&brw->intel, size, dst_stride);
340 char *dst = map;
341
342 while (count--) {
343 memcpy(dst, src, dst_stride);
344 src += src_stride;
345 dst += dst_stride;
346 }
347 intel_upload_unmap(&brw->intel, map, size, dst_stride,
348 &buffer->bo, &buffer->offset);
349 }
350 buffer->stride = dst_stride;
351 }
352
brw_prepare_vertices(struct brw_context * brw)353 static void brw_prepare_vertices(struct brw_context *brw)
354 {
355 struct gl_context *ctx = &brw->intel.ctx;
356 struct intel_context *intel = intel_context(ctx);
357 /* CACHE_NEW_VS_PROG */
358 GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
359 const unsigned char *ptr = NULL;
360 GLuint interleaved = 0;
361 unsigned int min_index = brw->vb.min_index;
362 unsigned int max_index = brw->vb.max_index;
363 int delta, i, j;
364
365 struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
366 GLuint nr_uploads = 0;
367
368 /* _NEW_POLYGON
369 *
370 * On gen6+, edge flags don't end up in the VUE (either in or out of the
371 * VS). Instead, they're uploaded as the last vertex element, and the data
372 * is passed sideband through the fixed function units. So, we need to
373 * prepare the vertex buffer for it, but it's not present in inputs_read.
374 */
375 if (intel->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
376 ctx->Polygon.BackMode != GL_FILL)) {
377 vs_inputs |= VERT_BIT_EDGEFLAG;
378 }
379
380 /* First build an array of pointers to ve's in vb.inputs_read
381 */
382 if (0)
383 printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
384
385 /* Accumulate the list of enabled arrays. */
386 brw->vb.nr_enabled = 0;
387 while (vs_inputs) {
388 GLuint i = ffsll(vs_inputs) - 1;
389 struct brw_vertex_element *input = &brw->vb.inputs[i];
390
391 vs_inputs &= ~BITFIELD64_BIT(i);
392 if (input->glarray->Size && get_size(input->glarray->Type))
393 brw->vb.enabled[brw->vb.nr_enabled++] = input;
394 }
395
396 if (brw->vb.nr_enabled == 0)
397 return;
398
399 if (brw->vb.nr_buffers)
400 goto prepare;
401
402 for (i = j = 0; i < brw->vb.nr_enabled; i++) {
403 struct brw_vertex_element *input = brw->vb.enabled[i];
404 const struct gl_client_array *glarray = input->glarray;
405 int type_size = get_size(glarray->Type);
406
407 input->element_size = type_size * glarray->Size;
408
409 if (_mesa_is_bufferobj(glarray->BufferObj)) {
410 struct intel_buffer_object *intel_buffer =
411 intel_buffer_object(glarray->BufferObj);
412 int k;
413
414 for (k = 0; k < i; k++) {
415 const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
416 if (glarray->BufferObj == other->BufferObj &&
417 glarray->StrideB == other->StrideB &&
418 glarray->InstanceDivisor == other->InstanceDivisor &&
419 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
420 {
421 input->buffer = brw->vb.enabled[k]->buffer;
422 input->offset = glarray->Ptr - other->Ptr;
423 break;
424 }
425 }
426 if (k == i) {
427 struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
428
429 /* Named buffer object: Just reference its contents directly. */
430 buffer->bo = intel_bufferobj_source(intel,
431 intel_buffer, type_size,
432 &buffer->offset);
433 drm_intel_bo_reference(buffer->bo);
434 buffer->offset += (uintptr_t)glarray->Ptr;
435 buffer->stride = glarray->StrideB;
436 buffer->step_rate = glarray->InstanceDivisor;
437
438 input->buffer = j++;
439 input->offset = 0;
440 }
441
442 /* This is a common place to reach if the user mistakenly supplies
443 * a pointer in place of a VBO offset. If we just let it go through,
444 * we may end up dereferencing a pointer beyond the bounds of the
445 * GTT. We would hope that the VBO's max_index would save us, but
446 * Mesa appears to hand us min/max values not clipped to the
447 * array object's _MaxElement, and _MaxElement frequently appears
448 * to be wrong anyway.
449 *
450 * The VBO spec allows application termination in this case, and it's
451 * probably a service to the poor programmer to do so rather than
452 * trying to just not render.
453 */
454 assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
455 } else {
456 /* Queue the buffer object up to be uploaded in the next pass,
457 * when we've decided if we're doing interleaved or not.
458 */
459 if (nr_uploads == 0) {
460 interleaved = glarray->StrideB;
461 ptr = glarray->Ptr;
462 }
463 else if (interleaved != glarray->StrideB ||
464 (uintptr_t)(glarray->Ptr - ptr) > interleaved)
465 {
466 interleaved = 0;
467 }
468 else if ((uintptr_t)(glarray->Ptr - ptr) & (type_size -1))
469 {
470 /* enforce natural alignment (for doubles) */
471 interleaved = 0;
472 }
473
474 upload[nr_uploads++] = input;
475 }
476 }
477
478 /* If we need to upload all the arrays, then we can trim those arrays to
479 * only the used elements [min_index, max_index] so long as we adjust all
480 * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
481 */
482 brw->vb.start_vertex_bias = 0;
483 delta = min_index;
484 if (nr_uploads == brw->vb.nr_enabled) {
485 brw->vb.start_vertex_bias = -delta;
486 delta = 0;
487 }
488 if (delta && !brw->intel.intelScreen->relaxed_relocations)
489 min_index = delta = 0;
490
491 /* Handle any arrays to be uploaded. */
492 if (nr_uploads > 1) {
493 if (interleaved) {
494 struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
495 /* All uploads are interleaved, so upload the arrays together as
496 * interleaved. First, upload the contents and set up upload[0].
497 */
498 copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
499 buffer, interleaved);
500 buffer->offset -= delta * interleaved;
501
502 for (i = 0; i < nr_uploads; i++) {
503 /* Then, just point upload[i] at upload[0]'s buffer. */
504 upload[i]->offset =
505 ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
506 upload[i]->buffer = j;
507 }
508 j++;
509
510 nr_uploads = 0;
511 }
512 }
513 /* Upload non-interleaved arrays */
514 for (i = 0; i < nr_uploads; i++) {
515 struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
516 if (upload[i]->glarray->InstanceDivisor == 0) {
517 copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
518 buffer, upload[i]->element_size);
519 } else {
520 /* This is an instanced attribute, since its InstanceDivisor
521 * is not zero. Therefore, its data will be stepped after the
522 * instanced draw has been run InstanceDivisor times.
523 */
524 uint32_t instanced_attr_max_index =
525 (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
526 copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
527 buffer, upload[i]->element_size);
528 }
529 buffer->offset -= delta * buffer->stride;
530 buffer->step_rate = upload[i]->glarray->InstanceDivisor;
531 upload[i]->buffer = j++;
532 upload[i]->offset = 0;
533 }
534
535 /* can we simply extend the current vb? */
536 if (j == brw->vb.nr_current_buffers) {
537 int delta = 0;
538 for (i = 0; i < j; i++) {
539 int d;
540
541 if (brw->vb.current_buffers[i].handle != brw->vb.buffers[i].bo->handle ||
542 brw->vb.current_buffers[i].stride != brw->vb.buffers[i].stride ||
543 brw->vb.current_buffers[i].step_rate != brw->vb.buffers[i].step_rate)
544 break;
545
546 d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset;
547 if (d < 0)
548 break;
549 if (i == 0)
550 delta = d / brw->vb.current_buffers[i].stride;
551 if (delta * brw->vb.current_buffers[i].stride != d)
552 break;
553 }
554
555 if (i == j) {
556 brw->vb.start_vertex_bias += delta;
557 while (--j >= 0)
558 drm_intel_bo_unreference(brw->vb.buffers[j].bo);
559 j = 0;
560 }
561 }
562
563 brw->vb.nr_buffers = j;
564
565 prepare:
566 brw_prepare_query_begin(brw);
567 }
568
brw_emit_vertices(struct brw_context * brw)569 static void brw_emit_vertices(struct brw_context *brw)
570 {
571 struct gl_context *ctx = &brw->intel.ctx;
572 struct intel_context *intel = intel_context(ctx);
573 GLuint i, nr_elements;
574
575 brw_prepare_vertices(brw);
576
577 brw_emit_query_begin(brw);
578
579 /* If the VS doesn't read any inputs (calculating vertex position from
580 * a state variable for some reason, for example), emit a single pad
581 * VERTEX_ELEMENT struct and bail.
582 *
583 * The stale VB state stays in place, but they don't do anything unless
584 * a VE loads from them.
585 */
586 if (brw->vb.nr_enabled == 0) {
587 BEGIN_BATCH(3);
588 OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
589 if (intel->gen >= 6) {
590 OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
591 GEN6_VE0_VALID |
592 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
593 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
594 } else {
595 OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
596 BRW_VE0_VALID |
597 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
598 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
599 }
600 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
601 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
602 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
603 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
604 CACHED_BATCH();
605 return;
606 }
607
608 /* Now emit VB and VEP state packets.
609 */
610
611 if (brw->vb.nr_buffers) {
612 if (intel->gen >= 6) {
613 assert(brw->vb.nr_buffers <= 33);
614 } else {
615 assert(brw->vb.nr_buffers <= 17);
616 }
617
618 BEGIN_BATCH(1 + 4*brw->vb.nr_buffers);
619 OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4*brw->vb.nr_buffers - 1));
620 for (i = 0; i < brw->vb.nr_buffers; i++) {
621 struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
622 uint32_t dw0;
623
624 if (intel->gen >= 6) {
625 dw0 = buffer->step_rate
626 ? GEN6_VB0_ACCESS_INSTANCEDATA
627 : GEN6_VB0_ACCESS_VERTEXDATA;
628 dw0 |= i << GEN6_VB0_INDEX_SHIFT;
629 } else {
630 dw0 = buffer->step_rate
631 ? BRW_VB0_ACCESS_INSTANCEDATA
632 : BRW_VB0_ACCESS_VERTEXDATA;
633 dw0 |= i << BRW_VB0_INDEX_SHIFT;
634 }
635
636 if (intel->gen >= 7)
637 dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
638
639 OUT_BATCH(dw0 | (buffer->stride << BRW_VB0_PITCH_SHIFT));
640 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);
641 if (intel->gen >= 5) {
642 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->bo->size - 1);
643 } else
644 OUT_BATCH(0);
645 OUT_BATCH(buffer->step_rate);
646
647 brw->vb.current_buffers[i].handle = buffer->bo->handle;
648 brw->vb.current_buffers[i].offset = buffer->offset;
649 brw->vb.current_buffers[i].stride = buffer->stride;
650 brw->vb.current_buffers[i].step_rate = buffer->step_rate;
651 }
652 brw->vb.nr_current_buffers = i;
653 ADVANCE_BATCH();
654 }
655
656 nr_elements = brw->vb.nr_enabled + brw->vs.prog_data->uses_vertexid;
657
658 /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
659 * for VertexID/InstanceID.
660 */
661 if (intel->gen >= 6) {
662 assert(nr_elements <= 34);
663 } else {
664 assert(nr_elements <= 18);
665 }
666
667 struct brw_vertex_element *gen6_edgeflag_input = NULL;
668
669 BEGIN_BATCH(1 + nr_elements * 2);
670 OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
671 for (i = 0; i < brw->vb.nr_enabled; i++) {
672 struct brw_vertex_element *input = brw->vb.enabled[i];
673 uint32_t format = get_surface_type(input->glarray->Type,
674 input->glarray->Size,
675 input->glarray->Format,
676 input->glarray->Normalized,
677 input->glarray->Integer);
678 uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
679 uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
680 uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
681 uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
682
683 /* The gen4 driver expects edgeflag to come in as a float, and passes
684 * that float on to the tests in the clipper. Mesa's current vertex
685 * attribute value for EdgeFlag is stored as a float, which works out.
686 * glEdgeFlagPointer, on the other hand, gives us an unnormalized
687 * integer ubyte. Just rewrite that to convert to a float.
688 */
689 if (input->attrib == VERT_ATTRIB_EDGEFLAG) {
690 /* Gen6+ passes edgeflag as sideband along with the vertex, instead
691 * of in the VUE. We have to upload it sideband as the last vertex
692 * element according to the B-Spec.
693 */
694 if (intel->gen >= 6) {
695 gen6_edgeflag_input = input;
696 continue;
697 }
698
699 if (format == BRW_SURFACEFORMAT_R8_UINT)
700 format = BRW_SURFACEFORMAT_R8_SSCALED;
701 }
702
703 switch (input->glarray->Size) {
704 case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
705 case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
706 case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
707 case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
708 : BRW_VE1_COMPONENT_STORE_1_FLT;
709 break;
710 }
711
712 if (intel->gen >= 6) {
713 OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
714 GEN6_VE0_VALID |
715 (format << BRW_VE0_FORMAT_SHIFT) |
716 (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
717 } else {
718 OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
719 BRW_VE0_VALID |
720 (format << BRW_VE0_FORMAT_SHIFT) |
721 (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
722 }
723
724 if (intel->gen >= 5)
725 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
726 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
727 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
728 (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
729 else
730 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
731 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
732 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
733 (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
734 ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
735 }
736
737 if (intel->gen >= 6 && gen6_edgeflag_input) {
738 uint32_t format = get_surface_type(gen6_edgeflag_input->glarray->Type,
739 gen6_edgeflag_input->glarray->Size,
740 gen6_edgeflag_input->glarray->Format,
741 gen6_edgeflag_input->glarray->Normalized,
742 gen6_edgeflag_input->glarray->Integer);
743
744 OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
745 GEN6_VE0_VALID |
746 GEN6_VE0_EDGE_FLAG_ENABLE |
747 (format << BRW_VE0_FORMAT_SHIFT) |
748 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
749 OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
750 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
751 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
752 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
753 }
754
755 if (brw->vs.prog_data->uses_vertexid) {
756 uint32_t dw0 = 0, dw1 = 0;
757
758 dw1 = ((BRW_VE1_COMPONENT_STORE_VID << BRW_VE1_COMPONENT_0_SHIFT) |
759 (BRW_VE1_COMPONENT_STORE_IID << BRW_VE1_COMPONENT_1_SHIFT) |
760 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
761 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
762
763 if (intel->gen >= 6) {
764 dw0 |= GEN6_VE0_VALID;
765 } else {
766 dw0 |= BRW_VE0_VALID;
767 dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
768 }
769
770 /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
771 * the format is ignored and the value is always int.
772 */
773
774 OUT_BATCH(dw0);
775 OUT_BATCH(dw1);
776 }
777
778 CACHED_BATCH();
779 }
780
781 const struct brw_tracked_state brw_vertices = {
782 .dirty = {
783 .mesa = _NEW_POLYGON,
784 .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
785 .cache = CACHE_NEW_VS_PROG,
786 },
787 .emit = brw_emit_vertices,
788 };
789
brw_upload_indices(struct brw_context * brw)790 static void brw_upload_indices(struct brw_context *brw)
791 {
792 struct gl_context *ctx = &brw->intel.ctx;
793 struct intel_context *intel = &brw->intel;
794 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
795 GLuint ib_size;
796 drm_intel_bo *bo = NULL;
797 struct gl_buffer_object *bufferobj;
798 GLuint offset;
799 GLuint ib_type_size;
800
801 if (index_buffer == NULL)
802 return;
803
804 ib_type_size = get_size(index_buffer->type);
805 ib_size = ib_type_size * index_buffer->count;
806 bufferobj = index_buffer->obj;
807
808 /* Turn into a proper VBO:
809 */
810 if (!_mesa_is_bufferobj(bufferobj)) {
811
812 /* Get new bufferobj, offset:
813 */
814 intel_upload_data(&brw->intel, index_buffer->ptr, ib_size, ib_type_size,
815 &bo, &offset);
816 brw->ib.start_vertex_offset = offset / ib_type_size;
817 } else {
818 offset = (GLuint) (unsigned long) index_buffer->ptr;
819
820 /* If the index buffer isn't aligned to its element size, we have to
821 * rebase it into a temporary.
822 */
823 if ((get_size(index_buffer->type) - 1) & offset) {
824 GLubyte *map = ctx->Driver.MapBufferRange(ctx,
825 offset,
826 ib_size,
827 GL_MAP_WRITE_BIT,
828 bufferobj);
829
830 intel_upload_data(&brw->intel, map, ib_size, ib_type_size,
831 &bo, &offset);
832 brw->ib.start_vertex_offset = offset / ib_type_size;
833
834 ctx->Driver.UnmapBuffer(ctx, bufferobj);
835 } else {
836 /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
837 * the index buffer state when we're just moving the start index
838 * of our drawing.
839 */
840 brw->ib.start_vertex_offset = offset / ib_type_size;
841
842 bo = intel_bufferobj_source(intel,
843 intel_buffer_object(bufferobj),
844 ib_type_size,
845 &offset);
846 drm_intel_bo_reference(bo);
847
848 brw->ib.start_vertex_offset += offset / ib_type_size;
849 }
850 }
851
852 if (brw->ib.bo != bo) {
853 drm_intel_bo_unreference(brw->ib.bo);
854 brw->ib.bo = bo;
855
856 brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
857 } else {
858 drm_intel_bo_unreference(bo);
859 }
860
861 if (index_buffer->type != brw->ib.type) {
862 brw->ib.type = index_buffer->type;
863 brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
864 }
865 }
866
867 const struct brw_tracked_state brw_indices = {
868 .dirty = {
869 .mesa = 0,
870 .brw = BRW_NEW_INDICES,
871 .cache = 0,
872 },
873 .emit = brw_upload_indices,
874 };
875
brw_emit_index_buffer(struct brw_context * brw)876 static void brw_emit_index_buffer(struct brw_context *brw)
877 {
878 struct intel_context *intel = &brw->intel;
879 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
880 GLuint cut_index_setting;
881
882 if (index_buffer == NULL)
883 return;
884
885 if (brw->prim_restart.enable_cut_index && !intel->is_haswell) {
886 cut_index_setting = BRW_CUT_INDEX_ENABLE;
887 } else {
888 cut_index_setting = 0;
889 }
890
891 BEGIN_BATCH(3);
892 OUT_BATCH(CMD_INDEX_BUFFER << 16 |
893 cut_index_setting |
894 get_index_type(index_buffer->type) << 8 |
895 1);
896 OUT_RELOC(brw->ib.bo,
897 I915_GEM_DOMAIN_VERTEX, 0,
898 0);
899 OUT_RELOC(brw->ib.bo,
900 I915_GEM_DOMAIN_VERTEX, 0,
901 brw->ib.bo->size - 1);
902 ADVANCE_BATCH();
903 }
904
905 const struct brw_tracked_state brw_index_buffer = {
906 .dirty = {
907 .mesa = 0,
908 .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
909 .cache = 0,
910 },
911 .emit = brw_emit_index_buffer,
912 };
913