| /external/llvm/include/llvm/MC/ |
| D | MachineLocation.h | 54 unsigned getReg() const { return Register; } in getReg() function
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| D | MCInst.h | 63 unsigned getReg() const { in getReg() function
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveRangeEdit.h | 131 unsigned getReg() const { return getParent().reg; } in getReg() function
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| D | ScheduleDAG.h | 235 unsigned getReg() const { in getReg() function
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| D | MachineFrameInfo.h | 46 unsigned getReg() const { return Reg; } in getReg() function
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| D | CallingConvLower.h | 76 static CCValAssign getReg(unsigned ValNo, MVT ValVT, in getReg() function
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| D | MachineOperand.h | 264 unsigned getReg() const { in getReg() function
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 287 unsigned OptimizePICCall::getReg(ValueType Entry) { in getReg() function in OptimizePICCall
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| D | MipsFastISel.cpp | 53 unsigned getReg() const { in getReg() function in __anon53f8ae240111::MipsFastISel::Address
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| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| D | RegisterSpec.java | 326 public int getReg() { in getReg() method in RegisterSpec
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| /external/libcxxabi/src/Unwind/ |
| D | UnwindCursor.hpp | 378 virtual unw_word_t getReg(int) { _LIBUNWIND_ABORT("getReg not implemented"); } in getReg() function in libunwind::AbstractUnwindCursor
580 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 203 unsigned getReg() const override { in getReg() function in __anon818a29540111::SparcOperand
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| /external/llvm/utils/TableGen/ |
| D | FastISelEmitter.cpp | 88 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; } in getReg() function in __anon432e3ab20311::OperandsSignature::OpKind
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| D | CodeGenRegisters.cpp | 174 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg() function in __anon591e2a2a0111::RegUnitIterator
1028 CodeGenRegister *CodeGenRegBank::getReg(Record *Def) { in getReg() function in CodeGenRegBank
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| D | DAGISelMatcher.h | 887 const CodeGenRegister *getReg() const { return Reg; } in getReg() function
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 94 unsigned getReg() const override { in getReg() function
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 294 unsigned getReg() const { return Reg; } in getReg() function in __anone431c6cb0111::ValueTracker
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 70 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
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| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 197 unsigned getReg() const override { in getReg() function in __anon765a2c600111::SystemZOperand
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| /external/llvm/lib/Target/R600/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 179 unsigned getReg() const override { in getReg() function in __anon92a627a80111::AMDGPUOperand
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 253 unsigned getReg() const { in getReg() function in __anon6b692ce60111::CountValue
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 939 unsigned getReg() const override { in getReg() function in __anon410038740311::MipsOperand
2400 unsigned MipsAsmParser::getReg(int RC, int RegNo) { in getReg() function in MipsAsmParser
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 401 unsigned getReg() const override { in getReg() function
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 452 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 359 unsigned getReg() const override { in getReg() function in __anon0b51bef40211::AArch64Operand
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