| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 81 void X86Assembler::pushl(const Immediate& imm) { in pushl()
106 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl()
134 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl()
198 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb()
252 void X86Assembler::movw(const Address& dst, const Immediate& imm) { in movw()
697 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd()
708 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss()
957 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw()
964 void X86Assembler::cmpl(Register reg, const Immediate& imm) { in cmpl()
1005 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { in cmpl()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 78 void X86_64Assembler::pushq(const Immediate& imm) { in pushq()
106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq()
122 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl()
131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq()
189 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl()
264 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) { in movb()
324 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw()
901 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd()
913 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss()
1199 void X86_64Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw()
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| D | assembler_x86_64_test.cc | 108 x86_64::Immediate imm(value); in TEST() local
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| /art/compiler/dex/quick/x86/ |
| D | assemble_x86.cc | 306 arr, arr_kind, arr_flags, imm, \ argument
1062 void X86Mir2Lir::EmitImm(const X86EncodingMap* entry, int64_t imm) { in EmitImm()
1190 int32_t imm) { in EmitMemImm()
1201 int32_t imm) { in EmitArrayImm()
1242 int32_t imm) { in EmitRegRegImm()
1255 int32_t raw_reg, int32_t raw_base, int disp, int32_t imm) { in EmitRegMemImm()
1268 int32_t raw_base, int32_t disp, int32_t raw_reg, int32_t imm) { in EmitMemRegImm()
1273 void X86Mir2Lir::EmitRegImm(const X86EncodingMap* entry, int32_t raw_reg, int32_t imm) { in EmitRegImm()
1287 void X86Mir2Lir::EmitThreadImm(const X86EncodingMap* entry, int32_t disp, int32_t imm) { in EmitThreadImm()
1299 void X86Mir2Lir::EmitMovRegImm(const X86EncodingMap* entry, int32_t raw_reg, int64_t imm) { in EmitMovRegImm()
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| D | target_x86.cc | 1828 int imm = mir->dalvikInsn.vB; in GenShiftByteVector() local
1858 int imm = mir->dalvikInsn.vB; in GenShiftLeftVector() local
1887 int imm = mir->dalvikInsn.vB; in GenSignedShiftRightVector() local
1915 int imm = mir->dalvikInsn.vB; in GenUnsignedShiftRightVector() local
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| D | int_x86.cc | 607 int imm, bool is_div) { in GenDivRemLit()
2148 int64_t imm, bool is_div) { in GenDivRemLongLit()
2337 int64_t imm = mir_graph_->ConstantValueWide(rl_src2); in GenDivRemLong() local
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| /art/compiler/utils/ |
| D | assembler_test.h | 183 for (int64_t imm : imms) { variable
423 for (int64_t imm : imms) { in RepeatTemplatedRegistersImm() local
516 for (int64_t imm : imms) { in RepeatRegisterImm() local
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| /art/compiler/linker/arm/ |
| D | relative_patcher_thumb2.cc | 70 uint32_t imm = (diff16 >> 11) & 0x1u; in PatchDexCacheReference() local
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 700 Immediate imm(GetInt32ValueOf(const_to_move)); in Move() local
2234 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitSub() local
2329 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitMul() local
2471 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemOneOrMinusOne() local
2512 int64_t imm = Int64FromConstant(second.GetConstant()); in DivByPowerOfTwo() local
2575 int imm = second.GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local
2618 int64_t imm = second.GetConstant()->AsLongConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local
2686 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateDivRemIntegral() local
2952 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue); in HandleShift() local
2974 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue); in HandleShift() local
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| D | code_generator_x86.cc | 727 Immediate imm(GetInt32ValueOf(const_to_move)); in Move() local
2132 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitMul() local
2343 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivRemOneOrMinusOne() local
2363 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivByPowerOfTwo() local
2385 int imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local
2475 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemIntegral() local
2787 Immediate imm(shift); in HandleShift() local
4106 Immediate imm(value); in EmitMove() local
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| D | code_generator_mips64.cc | 1020 int64_t imm = CodeGenerator::GetInt64ValueOf(right->AsConstant()); in HandleBinaryOp() local
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| /art/compiler/dex/quick/arm64/ |
| D | assemble_arm64.cc | 946 int32_t imm = lir->operands[1]; in AssembleLIR() local
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| D | target_arm64.cc | 417 uint64_t imm = DecodeLogicalImmediate(is_wide, operand); in BuildInsnString() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 55 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI()
84 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm) { in EmitFI()
646 void MipsAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, in StoreImmediateToFrame()
654 void MipsAssembler::StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm, in StoreImmediateToThread32()
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 556 void ArmAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, in StoreImmediateToFrame()
564 void ArmAssembler::StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm, in StoreImmediateToThread32()
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| D | assembler_thumb2.cc | 844 uint32_t imm = so.GetImmediate(); in Emit32BitDataProcessing() local
860 uint32_t imm = ModifiedImmediate(so.encodingThumb()); in Emit32BitDataProcessing() local
1700 void Thumb2Assembler::ldrex(Register rt, Register rn, uint16_t imm, Condition cond) { in ldrex()
1723 uint16_t imm, in strex()
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| D | assembler_arm32_test.cc | 176 for (uint32_t imm = 1; imm < 32; ++imm) { in SetUpHelpers() local
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 156 void Arm64Assembler::StoreImmediateToFrame(FrameOffset offs, uint32_t imm, in StoreImmediateToFrame()
165 void Arm64Assembler::StoreImmediateToThread64(ThreadOffset<8> offs, uint32_t imm, in StoreImmediateToThread64()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 47 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI()
85 void Mips64Assembler::EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) { in EmitFI()
1190 void Mips64Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, in StoreImmediateToFrame()
1198 void Mips64Assembler::StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm, in StoreImmediateToThread64()
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| /art/disassembler/ |
| D | disassembler_arm.cc | 168 uint32_t imm = (instruction & 0xff); in ShiftedImmediate() local
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| /art/compiler/dex/quick/ |
| D | gen_common.cc | 61 void Mir2Lir::GenIfNullUseHelperImm(RegStorage r_result, QuickEntrypointEnum trampoline, int imm) { in GenIfNullUseHelperImm()
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