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Searched defs:operand (Results 1 – 12 of 12) sorted by relevance

/art/compiler/utils/x86_64/
Dassembler_x86_64.cc1799 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll()
1804 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq()
1819 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl()
1824 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq()
1834 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl()
1844 void X86_64Assembler::sarq(CpuRegister operand, CpuRegister shifter) { in sarq()
2108 void X86_64Assembler::EmitOperand(uint8_t reg_or_opcode, const Operand& operand) { in EmitOperand()
2137 const Operand& operand, in EmitComplex()
2201 CpuRegister operand, in EmitGenericShift()
2258 void X86_64Assembler::EmitOptionalRex32(const Operand& operand) { in EmitOptionalRex32()
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/art/compiler/dex/
Dglobal_value_numbering.cc212 uint16_t operand = lvns_[pred_id]->GetSregValue(pred_bb->last_mir_insn->ssa_rep->uses[0]); in IsBlockEnteredOnTrue() local
Dlocal_value_numbering.cc1607 uint16_t operand = GetOperandValue(mir->ssa_rep->uses[0]); in GetValueNumber() local
1617 uint16_t operand = GetOperandValue(mir->ssa_rep->uses[0]); in GetValueNumber() local
/art/compiler/dex/quick/arm64/
Dtarget_arm64.cc237 static void DecodeRegExtendOrShift(int operand, char *buf, size_t buf_size) { in DecodeRegExtendOrShift()
347 int operand; in BuildInsnString() local
Dassemble_arm64.cc708 uint32_t operand = lir->operands[i]; in EncodeLIRs() local
/art/compiler/dex/quick/mips/
Dassemble_mips.cc795 uint32_t operand; in AssembleInstructions() local
Dtarget_mips.cc375 int operand; in BuildInsnString() local
/art/compiler/utils/x86/
Dassembler_x86.cc1299 void X86Assembler::shll(Register operand, Register shifter) { in shll()
1319 void X86Assembler::shrl(Register operand, Register shifter) { in shrl()
1339 void X86Assembler::sarl(Register operand, Register shifter) { in sarl()
1619 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { in EmitOperand()
1640 const Operand& operand, in EmitComplex()
1681 const Operand& operand, in EmitGenericShift()
1697 const Operand& operand, in EmitGenericShift()
/art/compiler/dex/quick/arm/
Dassemble_arm.cc1104 uint32_t operand; in EncodeLIRs() local
Dtarget_arm.cc362 int operand; in BuildInsnString() local
/art/compiler/dex/quick/x86/
Dtarget_x86.cc376 int operand = lir->operands[operand_number]; in BuildInsnString() local
/art/compiler/optimizing/
Dcode_generator_arm.cc971 ShifterOperand operand; in GenerateTestAndBranch() local
1050 ShifterOperand operand; in VisitCondition() local