Searched defs:shift_type (Results 1 – 7 of 7) sorted by relevance
| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 891 T Simulator::ShiftOperand(T value, Shift shift_type, unsigned amount) { in ShiftOperand()
1394 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); in VisitAddSubShifted() local
1440 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); in VisitLogicalShifted() local
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| D | disasm-arm64.cc | 1540 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; in SubstituteShiftField() local
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 334 Shift shift_type, in ShiftOperand()
983 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); in VisitLogicalShifted() local
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| D | disasm-a64.cc | 3246 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; in SubstituteShiftField() local
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| /external/v8/src/arm/ |
| D | simulator-arm.cc | 2607 int32_t shift_type = instr->Bit(6); in DecodeType3() local
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| /external/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 3177 …RM::EmulateShiftImm (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type) in EmulateShiftImm()
3267 …RM::EmulateShiftReg (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type) in EmulateShiftReg()
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| /external/valgrind/VEX/priv/ |
| D | guest_arm_toIR.c | 9066 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; in decode_V6MEDIA_instruction() local
9126 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; in decode_V6MEDIA_instruction() local
9184 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; in decode_V6MEDIA_instruction() local
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