1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MipsISelDAGToDAG.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAGNodes.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
36 using namespace llvm;
37
38 #define DEBUG_TYPE "mips-isel"
39
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
43
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
48
runOnMachineFunction(MachineFunction & MF)49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50 Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
51 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
52
53 processFunctionAfterISel(MF);
54
55 return Ret;
56 }
57
58 /// getGlobalBaseReg - Output the instructions required to put the
59 /// GOT address into a register.
getGlobalBaseReg()60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
61 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
62 return CurDAG->getRegister(GlobalBaseReg,
63 getTargetLowering()->getPointerTy()).getNode();
64 }
65
66 /// ComplexPattern used on MipsInstrInfo
67 /// Used on Mips Load/Store instructions
selectAddrRegImm(SDValue Addr,SDValue & Base,SDValue & Offset) const68 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const {
70 llvm_unreachable("Unimplemented function.");
71 return false;
72 }
73
selectAddrRegReg(SDValue Addr,SDValue & Base,SDValue & Offset) const74 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const {
76 llvm_unreachable("Unimplemented function.");
77 return false;
78 }
79
selectAddrDefault(SDValue Addr,SDValue & Base,SDValue & Offset) const80 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
81 SDValue &Offset) const {
82 llvm_unreachable("Unimplemented function.");
83 return false;
84 }
85
selectIntAddr(SDValue Addr,SDValue & Base,SDValue & Offset) const86 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
87 SDValue &Offset) const {
88 llvm_unreachable("Unimplemented function.");
89 return false;
90 }
91
selectIntAddrMM(SDValue Addr,SDValue & Base,SDValue & Offset) const92 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
93 SDValue &Offset) const {
94 llvm_unreachable("Unimplemented function.");
95 return false;
96 }
97
selectIntAddrLSL2MM(SDValue Addr,SDValue & Base,SDValue & Offset) const98 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
99 SDValue &Offset) const {
100 llvm_unreachable("Unimplemented function.");
101 return false;
102 }
103
selectIntAddrMSA(SDValue Addr,SDValue & Base,SDValue & Offset) const104 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
105 SDValue &Offset) const {
106 llvm_unreachable("Unimplemented function.");
107 return false;
108 }
109
selectAddr16(SDNode * Parent,SDValue N,SDValue & Base,SDValue & Offset,SDValue & Alias)110 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
111 SDValue &Offset, SDValue &Alias) {
112 llvm_unreachable("Unimplemented function.");
113 return false;
114 }
115
selectVSplat(SDNode * N,APInt & Imm) const116 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const {
117 llvm_unreachable("Unimplemented function.");
118 return false;
119 }
120
selectVSplatUimm1(SDValue N,SDValue & Imm) const121 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
122 llvm_unreachable("Unimplemented function.");
123 return false;
124 }
125
selectVSplatUimm2(SDValue N,SDValue & Imm) const126 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
127 llvm_unreachable("Unimplemented function.");
128 return false;
129 }
130
selectVSplatUimm3(SDValue N,SDValue & Imm) const131 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
132 llvm_unreachable("Unimplemented function.");
133 return false;
134 }
135
selectVSplatUimm4(SDValue N,SDValue & Imm) const136 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
137 llvm_unreachable("Unimplemented function.");
138 return false;
139 }
140
selectVSplatUimm5(SDValue N,SDValue & Imm) const141 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
142 llvm_unreachable("Unimplemented function.");
143 return false;
144 }
145
selectVSplatUimm6(SDValue N,SDValue & Imm) const146 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
147 llvm_unreachable("Unimplemented function.");
148 return false;
149 }
150
selectVSplatUimm8(SDValue N,SDValue & Imm) const151 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
152 llvm_unreachable("Unimplemented function.");
153 return false;
154 }
155
selectVSplatSimm5(SDValue N,SDValue & Imm) const156 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
157 llvm_unreachable("Unimplemented function.");
158 return false;
159 }
160
selectVSplatUimmPow2(SDValue N,SDValue & Imm) const161 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
162 llvm_unreachable("Unimplemented function.");
163 return false;
164 }
165
selectVSplatUimmInvPow2(SDValue N,SDValue & Imm) const166 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
167 llvm_unreachable("Unimplemented function.");
168 return false;
169 }
170
selectVSplatMaskL(SDValue N,SDValue & Imm) const171 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
172 llvm_unreachable("Unimplemented function.");
173 return false;
174 }
175
selectVSplatMaskR(SDValue N,SDValue & Imm) const176 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
177 llvm_unreachable("Unimplemented function.");
178 return false;
179 }
180
181 /// Select instructions not customized! Used for
182 /// expanded, promoted and normal instructions
Select(SDNode * Node)183 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
184 unsigned Opcode = Node->getOpcode();
185
186 // Dump information about the Node being selected
187 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
188
189 // If we have a custom node, we already have selected!
190 if (Node->isMachineOpcode()) {
191 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
192 Node->setNodeId(-1);
193 return nullptr;
194 }
195
196 // See if subclasses can handle this node.
197 std::pair<bool, SDNode*> Ret = selectNode(Node);
198
199 if (Ret.first)
200 return Ret.second;
201
202 switch(Opcode) {
203 default: break;
204
205 // Get target GOT address.
206 case ISD::GLOBAL_OFFSET_TABLE:
207 return getGlobalBaseReg();
208
209 #ifndef NDEBUG
210 case ISD::LOAD:
211 case ISD::STORE:
212 assert((Subtarget->systemSupportsUnalignedAccess() ||
213 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
214 cast<MemSDNode>(Node)->getAlignment()) &&
215 "Unexpected unaligned loads/stores.");
216 break;
217 #endif
218 }
219
220 // Select the default instruction
221 SDNode *ResNode = SelectCode(Node);
222
223 DEBUG(errs() << "=> ");
224 if (ResNode == nullptr || ResNode == Node)
225 DEBUG(Node->dump(CurDAG));
226 else
227 DEBUG(ResNode->dump(CurDAG));
228 DEBUG(errs() << "\n");
229 return ResNode;
230 }
231
232 bool MipsDAGToDAGISel::
SelectInlineAsmMemoryOperand(const SDValue & Op,unsigned ConstraintID,std::vector<SDValue> & OutOps)233 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
234 std::vector<SDValue> &OutOps) {
235 // All memory constraints can at least accept raw pointers.
236 switch(ConstraintID) {
237 default:
238 llvm_unreachable("Unexpected asm memory constraint");
239 case InlineAsm::Constraint_i:
240 case InlineAsm::Constraint_m:
241 case InlineAsm::Constraint_R:
242 case InlineAsm::Constraint_ZC:
243 OutOps.push_back(Op);
244 return false;
245 }
246 return true;
247 }
248