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Searched refs:r_src2 (Results 1 – 11 of 11) sorted by relevance

/art/compiler/dex/quick/arm64/
Dutility_arm64.cc564 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) { in OpRegRegShift() argument
566 CHECK_EQ(r_dest_src1.Is64Bit(), r_src2.Is64Bit()); in OpRegRegShift()
591 return NewLIR2(kA64Rev2rr | wide, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegRegShift()
594 NewLIR2(kA64Rev162rr | wide, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegRegShift()
601 return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 7); in OpRegRegShift()
605 return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15); in OpRegRegShift()
610 return NewLIR4(kA64Ubfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15); in OpRegRegShift()
612 return OpRegRegRegShift(op, r_dest_src1, r_dest_src1, r_src2, shift); in OpRegRegShift()
618 return NewLIR2(opcode | wide, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegRegShift()
622 return NewLIR3(opcode | wide, r_dest_src1.GetReg(), r_src2.GetReg(), shift); in OpRegRegShift()
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Dcodegen_arm64.h215 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
220 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
372 LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
373 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
377 LIR* OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,
379 LIR* OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
Dint_arm64.cc636 RegLocation Arm64Mir2Lir::GenDivRem(RegLocation rl_dest, RegStorage r_src1, RegStorage r_src2, in GenDivRem() argument
638 CHECK_EQ(r_src1.Is64Bit(), r_src2.Is64Bit()); in GenDivRem()
642 OpRegRegReg(kOpDiv, rl_result.reg, r_src1, r_src2); in GenDivRem()
655 OpRegRegReg(kOpDiv, temp, r_src1, r_src2); in GenDivRem()
657 r_src2.GetReg(), r_src1.GetReg()); in GenDivRem()
/art/compiler/dex/quick/arm/
Dutility_arm.cc285 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, in OpRegRegShift() argument
288 ((shift == 0) && r_dest_src1.Low8() && r_src2.Low8()); in OpRegRegShift()
307 else if ((shift == 0) && !r_dest_src1.Low8() && !r_src2.Low8()) in OpRegRegShift()
321 if (r_dest_src1.Low8() && r_src2.Low8()) in OpRegRegShift()
323 else if (!r_dest_src1.Low8() && !r_src2.Low8()) in OpRegRegShift()
376 return NewLIR3(kThumb2RevRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()); in OpRegRegShift()
384 return NewLIR3(kThumb2RevshRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()); in OpRegRegShift()
390 return NewLIR4(kThumb2Sbfx, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 8); in OpRegRegShift()
393 return NewLIR4(kThumb2Sbfx, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 16); in OpRegRegShift()
396 return NewLIR4(kThumb2Ubfx, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 16); in OpRegRegShift()
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Dcodegen_arm.h212 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
217 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
225 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
227 LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
/art/compiler/dex/quick/mips/
Dutility_mips.cc304 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
306 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit() || r_src2.Is64Bit()); in OpRegRegReg()
343 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegReg()
466 LIR* MipsMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() argument
474 return NewLIR3(kMipsNor, r_dest_src1.GetReg(), r_src2.GetReg(), rZERO); in OpRegReg()
477 return NewLIR3(kMips64Dsubu, r_dest_src1.GetReg(), rZEROd, r_src2.GetReg()); in OpRegReg()
479 return NewLIR3(kMipsSubu, r_dest_src1.GetReg(), rZERO, r_src2.GetReg()); in OpRegReg()
487 return OpRegRegReg(op, r_dest_src1, r_dest_src1, r_src2); in OpRegReg()
490 res = NewLIR2(kMipsSeb, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegReg()
494 res = NewLIR2(kMipsSeb, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegReg()
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Dcodegen_mips.h209 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
214 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
/art/compiler/dex/quick/x86/
Dutility_x86.cc201 LIR* X86Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() argument
208 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
211 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
214 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
217 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
237 if (r_src2.GetRegNum() >= rs_rX86_SP_32.GetRegNum()) { in OpRegReg()
238 NewLIR2(is64Bit ? kX86Mov64RR : kX86Mov32RR, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegReg()
253 CHECK(!src2_must_be_cx || r_src2.GetReg() == rs_rCX.GetReg()); in OpRegReg()
254 return NewLIR2(opcode, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegReg()
452 RegStorage r_src2) { in OpRegRegReg() argument
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Dfp_x86.cc67 RegStorage r_src2 = rl_src2.reg; in GenArithOpFloat() local
68 if (r_dest == r_src2) { in GenArithOpFloat()
69 r_src2 = AllocTempSingle(); in GenArithOpFloat()
70 OpRegCopy(r_src2, r_dest); in GenArithOpFloat()
73 NewLIR2(op, r_dest.GetReg(), r_src2.GetReg()); in GenArithOpFloat()
Dcodegen_x86.h308 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
313 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
/art/compiler/dex/quick/
Dmir_to_lir.h1420 virtual LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) = 0;
1457 RegStorage r_src2) = 0;