Searched refs:reg_or_opcode (Results 1 – 5 of 5) sorted by relevance
| /art/disassembler/ |
| D | disassembler_x86.cc | 877 uint8_t reg_or_opcode = (instr[1] >> 3) & 7; in DumpInstruction() local
878 switch (reg_or_opcode) { in DumpInstruction()
1278 uint8_t reg_or_opcode = (modrm >> 3) & 7; in DumpInstruction() local
1285 opcode3 = modrm_opcodes[reg_or_opcode]; in DumpInstruction()
1299 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], dst_reg_file); in DumpInstruction()
1310 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], src_reg_file); in DumpInstruction()
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 1619 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { in EmitOperand() argument
1620 CHECK_GE(reg_or_opcode, 0); in EmitOperand()
1621 CHECK_LT(reg_or_opcode, 8); in EmitOperand()
1626 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); in EmitOperand()
1639 void X86Assembler::EmitComplex(int reg_or_opcode, in EmitComplex() argument
1642 CHECK_GE(reg_or_opcode, 0); in EmitComplex()
1643 CHECK_LT(reg_or_opcode, 8); in EmitComplex()
1647 EmitOperand(reg_or_opcode, operand); in EmitComplex()
1651 EmitUint8(0x05 + (reg_or_opcode << 3)); in EmitComplex()
1655 EmitOperand(reg_or_opcode, operand); in EmitComplex()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 2108 void X86_64Assembler::EmitOperand(uint8_t reg_or_opcode, const Operand& operand) { in EmitOperand() argument
2109 CHECK_GE(reg_or_opcode, 0); in EmitOperand()
2110 CHECK_LT(reg_or_opcode, 8); in EmitOperand()
2115 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); in EmitOperand()
2136 void X86_64Assembler::EmitComplex(uint8_t reg_or_opcode, in EmitComplex() argument
2139 CHECK_GE(reg_or_opcode, 0); in EmitComplex()
2140 CHECK_LT(reg_or_opcode, 8); in EmitComplex()
2144 EmitOperand(reg_or_opcode, operand); in EmitComplex()
2148 EmitUint8(0x05 + (reg_or_opcode << 3)); in EmitComplex()
2152 EmitOperand(reg_or_opcode, operand); in EmitComplex()
[all …]
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| /art/compiler/dex/quick/x86/ |
| D | assemble_x86.cc | 1013 void X86Mir2Lir::EmitModrmThread(uint8_t reg_or_opcode) { in EmitModrmThread() argument
1016 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rX86_SP_32.GetRegNum(); in EmitModrmThread()
1021 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rBP.GetRegNum(); in EmitModrmThread()
1026 void X86Mir2Lir::EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp) { in EmitModrmDisp() argument
1027 DCHECK_LT(reg_or_opcode, 8); in EmitModrmDisp()
1030 uint8_t modrm = (0x0 << 6) | (reg_or_opcode << 3) | 0x5; in EmitModrmDisp()
1038 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (reg_or_opcode << 3) | base; in EmitModrmDisp()
1048 void X86Mir2Lir::EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, in EmitModrmSibDisp() argument
1050 DCHECK_LT(RegStorage::RegNum(reg_or_opcode), 8); in EmitModrmSibDisp()
1051 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | RegStorage::RegNum(reg_or_opcode) << 3 | in EmitModrmSibDisp()
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| D | codegen_x86.h | 447 void EmitModrmThread(uint8_t reg_or_opcode);
448 void EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp);
449 void EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, int scale,
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